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In the Virtex 4 FPGA, slices within a CLB are interconnected with eachother. However, in Virtex 5 and Virtex 6, there is no direct connectionbetween slices of a CLB. Why was this change made? Thanks --------------------------------------- Posted through http://www.FPGARelated.com______________________________
null <anonymous.reply.sender@n_o_s_p_a_m.gmail.com> wrote: > In the Virtex 4 FPGA, slices within a CLB are interconnected with each > other. However, in Virtex 5 and Virtex 6, there is no direct connection > between slices of a CLB. Why was this change made? On what connections do you refer? Give some reference to the appropriate diagram in the userguide/datasheet. -- Uwe Bonnes b...@elektron.ikp.physik.tu-darmstadt.de Institut fuer Kernphysik Schlossgartenstrasse 9 64289 Darmstadt --------- Tel. 06151 162516 -------- Fax. 06151 164321 ----------