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Hello. I have designed an ethernet interface with a Xilinx Virtex 5 FPGAand a LXT972 Intel's IC. Besides, I have a GUI designed in the computerhost to send/receive files and information. Using a sniffer, I can see sometimes that data coming back from the boardis read as pass-through packets, instead of having the right direction(input). Could someone help me? I'm sorry if the question is not relevant, is the first time I'm posting. --------------------------------------- Posted through http://www.FPGARelated.com