Sign in

username:

password:



Not a member?

Search Comp.Arch.FPGA



Search tips

fpga by Keywords

Altera | ASIC | CPLD | Cyclone | DCM | DDR | DSP | Ethernet | ISE | JTAG | Linux | LVDS | Microblaze | ML310 | Modelsim | NIOS | OPB | PCI | Quartus | RocketIO | SDRAM | Spartan | Spartan3 | SRAM | Stratix | Verilog | VHDL | Virtex | Virtex-4 | Virtex-II | Xilinx | XST

Ads

See Also

DSPEmbedded SystemsElectronics

Comp.Arch.FPGA | Programming individual FPGAs in a daisy chain

There are 6 messages in this thread.

You are currently looking at messages 0 to 6.

Programming individual FPGAs in a daisy chain - salimbaba - 2010-07-08 11:03:00

is it possible to program only one FPGA in the
chain from EEPROM i.e. firstFPGA without disconnecting other one from the loop.?

Also, how do we generate the mcs file for the daisy chained FPGAs?

Thanks	   
					
---------------------------------------		
Posted through http://www.FPGARelated.com
______________________________
Join the blogging team on FPGARelated.com and earn rewards! Details Here.



Re: Programming individual FPGAs in a daisy chain - d_s_klein - 2010-07-08 13:35:00

On Jul 8, 8:03=A0am, "salimbaba"
<a1234573@n_o_s_p_a_m.n_o_s_p_a_m.owlpic.com> wrote:

> is it possible to program only one FPGA in the chain from EEPROM i.e. fir=
st
> FPGA without disconnecting other one from the loop.?

Yes.  The difficulty is getting just one FPGA in a chain into program
mode.

> Also, how do we generate the mcs file for the daisy chained FPGAs?

Xilinx Impact.  There's an XAPP for that.

> Thanks =A0 =A0

Ciao.

Re: Programming individual FPGAs in a daisy chain - salimbaba - 2010-07-08 14:57:00

Can u give me a link to the xapp ?	   
					
---------------------------------------		
Posted through http://www.FPGARelated.com
______________________________
Join the blogging team on FPGARelated.com and earn rewards! Details Here.

Re: Programming individual FPGAs in a daisy chain - d_s_klein - 2010-07-09 01:16:00

On Jul 8, 11:57=A0am, "salimbaba"
<a1234573@n_o_s_p_a_m.n_o_s_p_a_m.owlpic.com> wrote:
> Can u give me a link to the xapp ? =A0 =A0 =A0 =A0
>
> --------------------------------------- =A0 =A0 =A0 =A0
> Posted throughhttp://www.FPGARelated.com

<http://www.google.com/search?q=3DUG332>;  Same book symon pointed you
to.

The restriction is that it is only the 1st chip can be done by
itself.  (If you can get around the other problem I mentioned.)

How to create an mcs file is here:
<http://www.google.com/search?q=3Dimpact+user+guide>;

Cheers!

Re: Programming individual FPGAs in a daisy chain - rickman - 2010-07-09 11:56:00

On Jul 9, 1:16=A0am, d_s_klein
<d_s_kl...@yahoo.com> wrote:
> On Jul 8, 11:57=A0am, "salimbaba"
>
> <a1234573@n_o_s_p_a_m.n_o_s_p_a_m.owlpic.com> wrote:
> > Can u give me a link to the xapp ? =A0 =A0 =A0 =A0
>
> > --------------------------------------- =A0 =A0 =A0 =A0
> > Posted throughhttp://www.FPGARelated.com
>
> <http://www.google.com/search?q=3DUG332>; =A0Same book symon pointed you
> to.
>
> The restriction is that it is only the 1st chip can be done by
> itself. =A0(If you can get around the other problem I mentioned.)
>
> How to create an mcs file is here:
> <http://www.google.com/search?q=3Dimpact+user+guide>;
>
> Cheers!

Is that true?  If the PROG signals to each FPGA are separate, then any
of the chips can be put into programming mode.  When being configured,
once an FPGA has received its entire bitstream and is ready to enter
user mode, it passes all configuration data received out to the next
chip which does the same.  I don't know if the FPGAs continue to pass
the configuration data after they have transitioned into user mode,
but if they do, you should be able to put one chip into configuration
mode and pass the bitstream through the other FPGAs.

Does anyone know if these FPGAs continue to pass configuration data
after they enter user mode?

Rick

Re: Programming individual FPGAs in a daisy chain - Gabor - 2010-07-09 12:39:00

On Jul 9, 11:56=A0am, rickman
<gnu...@gmail.com> wrote:
> On Jul 9, 1:16=A0am, d_s_klein <d_s_kl...@yahoo.com> wrote:
>
>
>
> > On Jul 8, 11:57=A0am, "salimbaba"
>
> > <a1234573@n_o_s_p_a_m.n_o_s_p_a_m.owlpic.com> wrote:
> > > Can u give me a link to the xapp ? =A0 =A0 =A0 =A0
>
> > > --------------------------------------- =A0 =A0 =A0 =A0
> > > Posted throughhttp://www.FPGARelated.com
>
> > <http://www.google.com/search?q=3DUG332>; =A0Same book symon pointed you
> > to.
>
> > The restriction is that it is only the 1st chip can be done by
> > itself. =A0(If you can get around the other problem I mentioned.)
>
> > How to create an mcs file is here:
> > <http://www.google.com/search?q=3Dimpact+user+guide>;
>
> > Cheers!
>
> Is that true? =A0If the PROG signals to each FPGA are separate, then any
> of the chips can be put into programming mode. =A0When being configured,
> once an FPGA has received its entire bitstream and is ready to enter
> user mode, it passes all configuration data received out to the next
> chip which does the same. =A0I don't know if the FPGAs continue to pass
> the configuration data after they have transitioned into user mode,
> but if they do, you should be able to put one chip into configuration
> mode and pass the bitstream through the other FPGAs.
>
> Does anyone know if these FPGAs continue to pass configuration data
> after they enter user mode?
>
> Rick

Assuming that the programming pins are not re-used by the design they
can be "preserved" in their boot-up mode.  However this doesn't solve
the issue of programming only the second device via EEPROM unless
the first one magically comes up configured.  Generally if you have
special requirements for programming or reprogramming single devices
they should have their own EEPROM or you should add a separate
device to configure them.  It's pretty easy to accomplish this
from a microcontroller using slave serial mode.  The XCFxxS series
and older XC17xx and XC18xx devices only have an address reset,
not a select.  So again which ever device you program from them
must have its bitstream starting at the first location in the device.
So really you have pretty limited choices without either multiple
configuration devices or an external configuration controller.

Regards,
Gabor
______________________________
Join the blogging team on FPGARelated.com and earn rewards! Details Here.