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Comp.Arch.FPGA | I have problem in writing testbench

There are 2 messages in this thread.

You are currently looking at messages 0 to 2.

I have problem in writing testbench - somayeh2010 - 2010-08-17 08:38:00

This is my testbench code.
When I load it and want see signals in wave, after I add it, wave isempty.
I do everything but the problem isn't solve.
Can anyone help me?

library ieee;
use ieee.std_logic_1164.all;
use work.all;

entity test_dff is
end test_dff;

architecture behavioral of test_dff is
  component dff
    port(din,clk,rst:in std_logic;
        dout:out std_logic);
  end component;
  signal clk1:std_logic:='0';
  signal rst1:std_logic:='0';
  signal din1:std_logic;
  signal dout1:std_logic;
            
  begin
    unit0: dff port map(din=>din1,clk=>clk1,rst=>rst1,dout=>dout1);
      process
        begin
          din1<='0';
          wait for 100 ns;
          
          din1<='1';
          wait for 100 ns;
          
          din1<='0';
          wait for 100 ns;
          
          din1<='1';
          wait for 100 ns;
        end process;
          
               
      clock: process
        begin
          clk1<=not clk1 after 25 ns;
          wait for 50 ns;
        end process clock;
        
      stimulus: process
        begin
          wait for 5 ns; rst1<='1';
          wait for 4 ns; rst1 <='0';       
          wait;
        end PROCESS stimulus;

end behavioral;



	   
					
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Re: I have problem in writing testbench - Jonathan Bromley - 2010-08-17 09:23:00

On Tue, 17 Aug 2010 07:38:39 -0500,
"somayeh2010" wrote:

>This is my testbench code.

It never stops.  I wonder if that's why you don't see any waves?
Try adding a timeout process:

  process begin
    wait for 500 ns;
    report "Normal end of simulation" severity FAILURE;
    wait;
  end process;

>When I load it and want see signals in wave, after I add it, wave is
>empty.

Which simulator?  Did you remember to run the simulation 
after loading it?

Simulators usually log only those signals that are already in the wave
window when you start the run.  If you're using ModelSim, for example,
you should...
- start the simulator GUI, but then work in the command console
  because the menus are tedious
- load the simulation BUT DO NOT START IT RUNNING:
      vsim -novopt test_dff
- set up the waves:
      add wave -r /*
- run the simulation:
      run -all

Other things that might make a difference (using ModelSim):
- try adding the -novopt option to the load command (vsim)
- just before starting simulation, issue the command
  log -r /*
  This instructs the simulator to log ALL signals, so that
  you can add them to the waves later.
- Having created the waveform display, try issuing this command:
  restart -force; run -all

>I do everything but the problem isn't solve.

Ah, if only that were true :-)  But it's a charming way 
to say "I tried really hard but I'm still stuck".

If you're using ModelSim, try the things I suggested.

If you're using some other simulator, tell us what it is.

-- 
Jonathan Bromley