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Comp.Arch.FPGA | Spartan-6 - What is the IODRP2_MCB??
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Spartan-6 - What is the IODRP2_MCB?? - =?windows-1252?Q?GaLaKtIkUs=99?= - 2010-08-26 18:43:00
Hi, While studying the MIG ref design for Spartan-6 I was surprised to find a IODRP2_MCB which doesn't have any documentation. Any information about it? Thanks
Re: Spartan-6 - What is the IODRP2_MCB?? - Gabor - 2010-08-27 09:23:00
On Aug 26, 6:43=A0pm, GaLaKtIkUs=99 <taileb.me...@gmail.com> wrote: > Hi, > While studying the MIG ref design for Spartan-6 I was surprised to > find a IODRP2_MCB which doesn't have any documentation. > Any information about it? > > Thanks If you have a design using the hard memory controller block, you'll find these in the FPGA editor. I can see that they are located in the IODELAY sites but contain a big box with not very illuminating pin names. It's probably another one of those stunt logic boxes that can only be used by the core generator like the IRDY and TRDY PCI pins. Regards, Gabor