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Comp.Arch.FPGA | DSP power consumption in Virtex devices...

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DSP power consumption in Virtex devices... - Xesium - 2011-08-29 13:33:00

Hi All,
I remember a while ago I read an article on Xilinx website regarding
low power modes of DSP blocks and Block RAMs on newer virtex devices
(V6 and V7 I guess). I know of suspend mode in Spartan devices to
reduce leakage which I think is for all FPGA fabric including BRAMs
and DSPs. However I'm pretty sure that there were similar features
(for example to turn off unused DSP blocks) for newer virtex devices.
I digged all the recent white papers about power consumption and yet I
can't find a single document implying such features.

Can you please help find this document or let me know if I'm wrong?

Thanks a lot for your help.

Amir