Some days I sit down to work and wonder how anything ever gets done. A simple example.  When I work on an FPGA design, I wind up with 3 or 4 screens full of documentation, generally in PDF format.  There are...]]> Wed, 08 Jul 2015 02:36:35 +0000 Victor Yurkovsky https://www.fpgarelated.com/showarticle/797.php While building a small CPU on a Spartan-6 chip I came across the same old problem: my Verilog was mapping to a lot of slices . Way more then seems reasonable. So let's dig in and see what's really going on.  

The J1 CPU (see Messing Around with a J1) is an amazingly streamlined design expressed in just over 100 lines of Verilog, and is reasonably compact at 150 Spartan-6...]]> Thu, 25 Jun 2015 00:14:31 +0000 Victor Yurkovsky https://www.fpgarelated.com/showarticle/794.php Here on bizarro we program using -- get this – text!  Our other senses - hearing, touch, smell, are not used at all. Even our visual perception is greatly underutilized - we just use two-dimensional text on a flat display a foot in front of our eyes.

Color is just beginning to be used, although in a lame syntax coloring way only. Granted, it makes it easier to...]]> Thu, 18 Jun 2015 02:12:40 +0000 Victor Yurkovsky https://www.fpgarelated.com/showarticle/790.php In this article I will examine James Bowman's excellent J1 CPU; I will then proceed to mess around with various parts of it, making it smaller, more appropriate to my particular application, and possibly faster.  I hope this will show you how easy it is to fiddle around with homemade CPUs and encourage you to make something weird and wonderful.

My hat is off to James...]]> Fri, 29 May 2015 04:09:26 +0000 Victor Yurkovsky https://www.fpgarelated.com/showarticle/786.php Building a bitstream from an HDL is a complicated process that requires the cooperation of a lot of tools.  You can hide behind an IDE or grow a pair and use command line tools and a makefile to tie your build process together.  I am not a huge fan of makefiles either (I believe a language should be expressive enough to automate the build process), but the alternatives are...]]> Tue, 12 May 2015 21:16:25 +0000 Victor Yurkovsky https://www.fpgarelated.com/showarticle/499.php It is almost universally accepted by the hobbyists that you can't work with high-density packages at home.  That is entirely incorrect.  I've been assembling and reflowing BGA circuit boards at home for a few years now.  BGAs and 0.5mm-pitch QFPs are well within the realm of a determined amateur. 

This series of articles presents practical information on designing and...]]> Sun, 13 Oct 2013 18:27:30 +0000 Victor Yurkovsky https://www.fpgarelated.com/showarticle/494.php Over the past decade I often wondered why anyone uses Windows.  It's just so... proprietary.  And pedestrian.  As I grew up my OS of choice went nothing to CPM to DOS (on Apple ][), GEM on Atari ST,  MS-DOS, DOS extenders, Mac OS, Windows NT, Windows XP, Linux...  Now, I again find myself a fan of Windows XP, the platform of the future.  (I am still a fan of bare...]]> Mon, 07 Oct 2013 01:43:49 +0000 Victor Yurkovsky https://www.fpgarelated.com/showarticle/434.php Ok, let's make a small stack-based CPU.

I will start where the rubber meets the road - the PC/stack subsystem that I like referring to as the 'legs'. As usual, I will present a design with a twist.

Not having a large design team, deadlines and million-dollar fab runs when designing CPUs creates a truly different environment. I can actually sit at the kitchen table and doodle around...]]> Tue, 23 Jul 2013 20:38:40 +0000 Victor Yurkovsky https://www.fpgarelated.com/showarticle/51.php I have a confession to make: I love PicoBlaze!  There are many reasons to love it.  It is a tiny CPU (96 Spartan3 slices or 26 Spartan6 slices plus a BRAM).  It is simple.  It is bug-free.  It's pretty fast.  It can reduce the size and the complexity of your design - instead of debugging a big state machine, just throw one (or more) of these in.  Add a serial...]]> Fri, 14 Jun 2013 17:15:48 +0000 Victor Yurkovsky https://www.fpgarelated.com/showarticle/49.php Sliding windows containing runs of microcode.

• Part 1: A new CPU - technology review, re-examination of the premises;  StrangeCPU concepts; x86 notes.

• Part 2: Sliding-Window Token Machines, an in-depth exploration of this curious technology; ARM notes.

• Mon, 13 May 2013 23:24:24 +0000 Victor Yurkovsky https://www.fpgarelated.com/showarticle/46.php Decoding instructions with a Sliding Window system.  0-Bit Sliding Register Windows.

  Table of Contents:
  • Part 1: A new CPU - technology review, re-examination of the premises;  StrangeCPU concepts; x86 notes.
  • Part 2: Sliding-Window Token Machines, an in-depth exploration of this curious technology; ARM notes.
  • Mon, 18 Mar 2013 16:01:52 +0000 Victor Yurkovsky https://www.fpgarelated.com/showarticle/45.php An in-depth exploration of Sliding Window Token Machines; ARM notes.
    Table of Contents:
    • Part 1: A new CPU - technology review, re-examination of the premises;  StrangeCPU concepts; x86 notes.
    • Part 2: Sliding-Window Token Machines, an in-depth exploration of this curious technology; ARM notes.
    • Tue, 05 Mar 2013 04:48:03 +0000 Victor Yurkovsky https://www.fpgarelated.com/showarticle/44.php Summary: In this multi-part series I will share with you a design, implementation notes and code for a slightly different kind of a CPU featuring a novel token machine that resolves an 8-bit token to pretty much any address in a 32-bit or even 64-bit address space, using not much more than an adder.
      Table of Contents:
      • Part 1: A new CPU - technology review, re-examination of the...]]> Mon, 25 Feb 2013 01:26:46 +0000 Victor Yurkovsky https://www.fpgarelated.com/showarticle/42.php Ridiculous? Read on - I will show you how to generate VGA timing in seven XilinxR Spartan3R slices.Some time ago I needed to output video to a VGA monitor for my Apple ][ FPGA clone.  Obviously (I thought), VGA's been done before and all I had to do was find some Verilog code and drop it into my design.  As is often the case (with me anyway), the task proved to be very different from...]]> Tue, 25 Sep 2012 20:19:07 +0000 Victor Yurkovsky https://www.fpgarelated.com/showarticle/39.php Flashback to 1986. A young man has a crazy idea - he wants to make a CPU all by himself. He is reading early Xilinx manuals cover to cover as if they were novels. Yes, you are quick - this is indeed a (mostly) true story about me and my dream, suddenly made possible by this new FPGA technology.

        Sadly more than 20 years went by before my first CPU ran in a Xilinx FPGA. Why did it take so long?...]]> Mon, 03 Sep 2012 02:08:36 +0000 Victor Yurkovsky