Digital Design (Verilog): An Embedded Systems Approach Using Verilog
Digital Design: An Embedded Systems Approach Using Verilog provides a foundation in digital design for students in computer engineering, electrical engineering and computer science courses. It takes an up-to-date and modern approach of presenting digital logic design as an activity in a larger systems design context.
Rather than focus on aspects of digital design that have little relevance in a realistic design context, this book concentrates on modern and evolving knowledge and design skills. Hardware description language (HDL)-based design and verification is emphasized--Verilog examples are used extensively throughout. By treating digital logic as part of embedded systems design, this book provides an understanding of the hardware needed in the analysis and design of systems comprising both hardware and software components.
Includes a Web site with links to vendor tools, labs and tutorials.
• Presents digital logic design as an activity in a larger systems design context.
• Features extensive use of Verilog examples to demonstrate HDL (hardware description language) usage at the abstract behavioural level and register transfer level, as well as for low-level verification and verification environments.
• Includes worked examples throughout to enhance the reader's understanding and retention of the material.
• Companion Web site includes links to tools for FPGA design from Synplicity, Mentor Graphics, and Xilinx, Verilog source code for all the examples in the book, lecture slides, laboratory projects, and solutions to exercises.
Why Read This Book
You should read this book if you want a system-oriented introduction to Verilog that ties RTL coding to real embedded hardware problems and verification practice. It balances language fundamentals, design techniques (FSMs, datapaths) and testbench-driven verification so you learn not just syntax but how to build and validate working hardware modules.
Who Will Benefit
Undergraduate/graduate students and junior hardware engineers or firmware developers who need to move from digital-logic basics to writing synthesizable Verilog and building verified embedded hardware blocks.
Level: Intermediate — Prerequisites: Basic digital-logic concepts (gates, Boolean algebra, combinational/sequential logic) and some programming familiarity; introductory electronics or circuits background is helpful.
Key Takeaways
- Model combinational and sequential circuits in synthesizable Verilog RTL
- Design and implement finite-state machines and datapath/control structures
- Write effective testbenches and apply simulation-based verification techniques
- Translate high-level system requirements into modular HDL implementations
- Apply synthesis considerations and coding styles suitable for FPGA/ASIC flows
- Integrate common embedded hardware components (memories, buses, I/O) into designs
Topics Covered
- Introduction: Digital design in an embedded-systems context
- Overview of Verilog: lexical conventions and language structure
- Data types, operators and expressions in Verilog
- Modelling combinational logic and design examples
- Modelling sequential logic: registers and timing
- Finite-state machine design and encoding techniques
- Structural design and component instantiation
- Design for testing: testbenches, simulation and verification
- Synthesis guidelines and mapping RTL to hardware
- Memory, buses and interfacing in embedded systems
- Arithmetic and datapath design (ALUs, adders, multipliers)
- Case studies and larger embedded-system examples
Languages, Platforms & Tools
How It Compares
More systems- and verification-oriented than Palnitkar's Verilog HDL (which is a compact language reference), and less hands-on FPGA/toolchain lab-focused than Pong Chu's FPGA Prototyping books which provide step-by-step synthesis and board examples.
