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BRAM based FIFO

Started by maha_66 6 years ago3 replieslatest reply 6 years ago2314 views
Hello! I am currently working on a matrix multiplication project. After performing the multiplication of the matrices, I am trying to build a module that can write...

VHDL Matrix Multiplication using UART and BRAM

Started by maha_66 6 years ago2 replieslatest reply 6 years ago457 views
My project involves performing matrix multiplication in vhdl. The two input matrices (8 bits each) are sent using a terminal and received via UART Rx. The FPGA...

Implementing octave algorithm in FPGA using c++

Started by Abhinav90 6 years ago11 replieslatest reply 6 years ago1332 views
I am currently working on writing a scrambler and DeScrambler code for Orthogonal Frequency Division Multiplexing(OFDM). I am planning to write an algorithm for...

Searching for info about very old FPGA devices

Started by rodrigomelo9 6 years ago3 replieslatest reply 6 years ago134 views
Hello. My name is Rodrigo and I am from Argentina. I was looking for very old datasheets without success :-( (I searched a lot in google, archive.org, alldatasheets,...

HDL to Schematic Reporting

Started by Sanram 6 years ago5 replieslatest reply 6 years ago856 views
I am looking at a tool (or combination of tools) to perform the following. Please advise.1) Read Verilog/VHDL RTL input code and convert it to technology independent...

Mux versus internal high impledance

Started by prashantpd 6 years ago5 replieslatest reply 6 years ago120 views
Hi, I have been an FPGA designer for more than a decade now and tutor a class on FPGA design at University presently. In all these years, I have had two ways of...

Is an ACM subscription worthwhile?

Started by david_days 6 years ago2 replieslatest reply 6 years ago73 views
This morning on my codeproject.com feed, I got a link to an ACM article about C.  But what caught my eye was that the cover of the edition had an article about...

Writing 16-bit data to bram

Started by gundamz2001 6 years ago6 replieslatest reply 6 years ago755 views
Hello,I am currently working on a Xilinx development board that has PowerPC and virtex 5. I used Xilinx core generator to instantiate a bram with data width size...

Xilinx IPs for DFT, FFT, LTE_FFT

Started by kaz 6 years ago4 replieslatest reply 6 years ago224 views
Just started looking into Xilinx Fourier transform ip and found out that there are three versions:DFT: apparently useful for any resolutionFFT: power of 2 resolution,...

Which FPGA kit to start with in 2018?

Started by david_days 6 years ago12 replieslatest reply 6 years ago11166 views
Hello, All!I'm a professional software developer who is trying to make the jump into FPGA for fun, learning, and my own research purposes.  I've been studying the...

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