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IP & Buses Terms

Vendor IP cores, AXI/AHB/APB, AvalonMM, Wishbone, on-chip interconnect, soft processors (MicroBlaze, Nios II, RISC-V cores).

4 terms in this category.

A I M W
A
  • AXI AXI (Advanced eXtensible Interface), formally AXI4, is a high-performance on-chip bus protocol defined by ARM as part of the AMBA specificat...
I
  • IP Core An IP core (Intellectual Property core) is a reusable block of logic, described in HDL or delivered as a netlist or hard silicon block, that...
M
  • Memory Controller A memory controller is a digital logic block, either integrated into an SoC/MCU or implemented as a discrete chip, that manages the electric...
W
  • Wishbone Bus Wishbone is an open, royalty-free on-chip interconnect specification originally developed by Silicore Corporation and now maintained by the ...
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