11 terms in this category.
B
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BRAM
Block RAM (BRAM) is a dedicated, hard-instantiated on-chip memory resource found in a wide range of FPGAs, distinct from logic fabric (LUTs/...
C
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CLB
A Configurable Logic Block (CLB) is the fundamental repeating logic cell in Xilinx FPGAs, consisting of lookup tables (LUTs), flip-flops, ca...
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Clock Enable
A clock enable (CE) is a synchronous control signal that gates the operation of a register, counter, or block of logic without gating the cl...
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Combinational Logic
Combinational logic is digital logic in which the output at any moment depends only on the current inputs, with no internal state or memory ...
D
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Distributed RAM
Distributed RAM is a feature of many SRAM-based FPGAs that allows the look-up tables (LUTs) normally used for logic to be reconfigured as sm...
F
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FIFO
A FIFO (First-In First-Out) is a storage buffer in which data is read out in the same order it was written in. It is commonly used to decoup...
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Finite State Machine
A finite state machine (FSM) is a computational model that describes a system as a fixed set of discrete states, a set of inputs, and define...
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Flip-Flop
A flip-flop (FF) is a bistable sequential logic element that stores one bit of state, holding its output stable until a triggering event, mo...
L
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Latch
A latch is a level-sensitive bistable storage element that is transparent to its input while an enable signal is asserted, and holds its las...
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LUT
A lookup table (LUT) is a small, configurable block of SRAM inside an FPGA or other programmable logic device that implements arbitrary comb...
S
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Slice (FPGA)
A slice is the basic repeating logic unit inside the configurable logic blocks (CLBs) of Xilinx FPGAs, containing a fixed bundle of look-up ...
