IDCODE is a mandatory JTAG register defined by IEEE 1149.1 that stores a 32-bit identification value identifying the manufacturer, part number, and revision of a device. It allows a JTAG controller to enumerate and identify devices in a scan chain without prior knowledge of the chain's contents.
In practice
When a JTAG debugger or programmer first connects to a target, it typically issues a reset and then reads the IDCODE register from each device in the scan chain. The 32-bit value encodes a 1-bit header (always 1), an 11-bit JEDEC manufacturer ID, a 16-bit part number, and a 4-bit revision code. Tools like OpenOCD maintain tables that map known IDCODE values to device configurations, so a matching IDCODE lets the tool automatically select the correct IR length, memory map, and flash algorithm.
In multi-device JTAG chains -- for example, an FPGA paired with a boundary-scan-capable MCU or a CPLD on the same board -- each device contributes its own IDCODE to the chain. The host reads them out sequentially after reset. A mismatch between the expected and actual IDCODE is a common cause of "device not found" or "IR length mismatch" errors during initial board bring-up.
Not all devices implement IDCODE. IEEE 1149.1 makes IDCODE optional, and some low-cost or legacy parts do not implement it at all. When BYPASS is selected on a TAP that lacks IDCODE, the TAP contributes a single zero bit per clock to the scan chain rather than a 32-bit identification value, which can cause debugger scripts that assume every TAP has a valid IDCODE to misidentify or skip such devices. Vendors may also use different assignment conventions or interpret the revision nibble differently across families, so the revision field in particular is not always reliable for distinguishing silicon stepping.
For FPGAs and CPLDs, the IDCODE is also used during configuration: a bitstream typically embeds the expected IDCODE, and on devices that perform this check, the device validates it against its own register before accepting the configuration data. On some families, a revision mismatch may cause configuration to be rejected even when the part number matches, but this behavior varies by vendor and device mode.
Frequently asked
What is the bit layout of a JTAG IDCODE register?
The 32-bit IDCODE field is structured as follows: bit 0 is always 1 (distinguishing it from a BYPASS response of 0), bits 1-11 hold the JEDEC manufacturer identity code, bits 12-27 hold the 16-bit part number assigned by the manufacturer, and bits 28-31 hold a 4-bit version or revision code.
Why does my debugger report an unexpected or all-zero IDCODE?
An all-zero IDCODE typically means the TAP is responding with the BYPASS register rather than IDCODE, either because the device does not implement IDCODE or because the TAP
state machine did not reset cleanly. Other causes include incorrect
JTAG voltage levels, a missing pull-up on TMS, or a device in power-down that is not fully active on the JTAG pins.
Does every MCU or FPGA have a unique IDCODE?
Most ARM Cortex-M based MCUs (STM32, nRF, Kinetis, SAM) and virtually all FPGAs (Xilinx, Intel/Altera, Lattice) expose a valid IDCODE. Some low-cost MCUs and older PIC or AVR parts either lack a
JTAG TAP entirely or implement only a minimal subset without IDCODE. Even among devices that do expose one, the part-number field encodes device family rather than individual units, so IDCODE cannot be used as a unique serial number.
How does OpenOCD use IDCODE?
OpenOCD reads IDCODE from each TAP during chain scanning and compares it against expected values in the target configuration script (set via the 'expected-id' parameter in a 'jtag newtap' declaration). A mismatch triggers an error by default, though it can be suppressed. The IDCODE also selects the correct flash driver and memory map when using predefined target scripts for common MCUs.
What is the difference between IDCODE and USERCODE on FPGAs?
IDCODE is a factory-programmed, read-only register identifying the silicon itself. USERCODE is a separate, optional
JTAG register defined by IEEE 1149.1 that stores a user-programmable 32-bit value typically loaded as part of the configuration
bitstream. On Xilinx and Intel FPGAs, USERCODE can be set to encode application version information, but it has no standardized format and is not used by low-level debug tools for device identification.
Differentiators vs similar concepts
IDCODE is sometimes confused with BYPASS, the other mandatory
IEEE 1149.1 register. BYPASS is a single-bit shift register used to shorten the scan path through devices that are not the current target; it returns no identification data. A TAP with BYPASS selected contributes a single zero bit per clock to the scan chain, which is distinct from a valid IDCODE response. IDCODE is also distinct from USERCODE, which is an optional JTAG register holding a user-programmable value loaded with the
FPGA bitstream and carrying no silicon identity information.
