Whups. Lattice Diamond says my package does not exist.

Started by Anonymous in comp.arch.fpga3 months ago 5 replies

Hi all. I'm stopped. Lattice Diamond does not offer a configuration for designing with my part in the 48-VFQFN package. The LCMXO2-640HC-6SG48I...

Hi all. I'm stopped. Lattice Diamond does not offer a configuration for designing with my part in the 48-VFQFN package. The LCMXO2-640HC-6SG48I is not available in the drop-down configuration menu. They say the closest they can get is the TQFP-100 or CSBGA-132 packages. My PCB and FPGA arrived days ago but I need a way to do development! Is there a way to configure Lattice Diamond


ZAP : An open source ARM processor (feedback)

Started by Anonymous in comp.arch.fpga4 months ago 19 replies

Hi, I am the author of the Gihub project ZAP ( https://github.com/krevanth/ZAP ). It is a 10-stage pipelined ARMv4T compatible soft processor...

Hi, I am the author of the Gihub project ZAP ( https://github.com/krevanth/ZAP ). It is a 10-stage pipelined ARMv4T compatible soft processor core with cache and memory management support. I developed it during my final semester in university. Would like your feedback/criticism of the project. Thanks, K Revanth


baud_generator (16x baud) used in UART transmitter logic

Started by _Xilinx in comp.arch.fpga4 months ago 3 replies

For http://www.ti.com/lit/ds/symlink/pc16550d.pdf#page=17 , how is the output of baud_generator (16x baud) used in transmitter logic ? I only...

For http://www.ti.com/lit/ds/symlink/pc16550d.pdf#page=17 , how is the output of baud_generator (16x baud) used in transmitter logic ? I only see there is a transmitter timing control block in the functional block diagram, but I am not sure how it works exactly. Anyone ?


May.25.2017 -- A plea for help

Started by Rick C. Hodgin in comp.arch.fpga4 months ago 18 replies

This world is run by evil madmen being guided by an insane evil spirit named Satan. The purpose of all of Satan's actions are to do...

This world is run by evil madmen being guided by an insane evil spirit named Satan. The purpose of all of Satan's actions are to do the opposite of that which God established, and to teach contrary things to that which God established. I would like to request help in changing that. The Lord Jesus Christ came to this Earth to restore that which was lost because of sin. He did that at th...


fpga zigbee interface

Started by Anonymous in comp.arch.fpga4 months ago 2 replies

i have spartan6 atlys(LX45) board, can anyone suggest me how to interface zigbee to this board to communicate with pc.thnx

i have spartan6 atlys(LX45) board, can anyone suggest me how to interface zigbee to this board to communicate with pc.thnx


Multiple ways to Heaven ... do not exist

Started by Rick C. Hodgin in comp.arch.fpga4 months ago 9 replies

It is common in our cultures today to embrace the idea that all spiritual roads lead to the same place, that the Muslim, Buddhist and other,...

It is common in our cultures today to embrace the idea that all spiritual roads lead to the same place, that the Muslim, Buddhist and other, will arrive in Heaven alongside the Christian and the Jew. That is a lie. It is Satan deceiving people into believing a lie so they will die unforgiven, and damned to eternal Hellfire for their sin. ----- There is ONE way for people to enter in t...


Accelerating Face Detection on Zynq-7020 Using High Level Synthesis

Started by yuning he in comp.arch.fpga4 months ago 6 replies

Hello, here is my question: Purpose: realize face detection on zynq-7020 SoC Platform: Zedboard with OV5640 camera Completed work: capturing...

Hello, here is my question: Purpose: realize face detection on zynq-7020 SoC Platform: Zedboard with OV5640 camera Completed work: capturing video from camera, writing into DDR for storage and reading from DDR for display Question: how to realize a face detection IP and its throughput can reach 30fps(pixel 320*240) Here are my jobs: Base on the Viola Jones algorithm, using HLS(high level ...


No judgment, just forgiveness and guidance

Started by Rick C. Hodgin in comp.arch.fpga4 months ago 23 replies

We all have sin. Sin places us under judgment and separates us from God. Sin is the embracing of things which run contrary to the way...

We all have sin. Sin places us under judgment and separates us from God. Sin is the embracing of things which run contrary to the way our universe was designed. It is therefore a type of cancer against creation, eating away at what was given us by God, eating away at what's right, true, and proper, all of the things which lead to our natural love and growth as God intended. Jesus came t...


Spartan 6 Digital controlled oscillator

Started by john tra in comp.arch.fpga4 months ago 2 replies

Hello, What is the best way to implement a 30 MHz clock generation circuit that can be dynamically controlled to provide fine frequency...

Hello, What is the best way to implement a 30 MHz clock generation circuit that can be dynamically controlled to provide fine frequency offsets in a Spartan 6, the clock is to be used internally and output via a pin? Would a DCM provide the functionality and what would the minimum frequency increment be? Thanks John


Configuration fault recovery

Started by Yannick Lamarre in comp.arch.fpga4 months ago 4 replies

Hi all, I've been thinking about this problem for a while and shared it with a few colleagues, but no one has yet to come up with an answer. For...

Hi all, I've been thinking about this problem for a while and shared it with a few colleagues, but no one has yet to come up with an answer. For some configuration, an FPGA can be configured so that two different drivers are connected on that same line internally. A practical example would be two BUFGs driving the same line on a Spartan6. If those two drivers are driving a different value in a ...


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