Analog to digital converters

Started by Rick C. Hodgin in comp.arch.fpga4 months ago 10 replies

I don't know where to ask this, so I'll try here. Are analog to digital converters fundamentally, in their core inner design, basically tiny...

I don't know where to ask this, so I'll try here. Are analog to digital converters fundamentally, in their core inner design, basically tiny systems which operate like 555 timers, with a series of resistors and capacitors designed to sample ranges, essentially counting ticks per fixed units of time, resulting in the digital data necessary to perform an indexed lookup from the inner sampler ...


designing a fpga

Started by kristoff in comp.arch.fpga4 months ago 38 replies

Hi all, A couple of weeks ago, I was watching the talk of Wolf Clifford on his opensource fpga flow at...

Hi all, A couple of weeks ago, I was watching the talk of Wolf Clifford on his opensource fpga flow at ccc. (https://www.youtube.com/watch?v=SOn0g3k0FlE) At the end, he mentions designing an open-source fpga and the replies he got when he mentioned the idea to hardware-companies. Appart from the question about the usefullness or economic viability of the idea itself (1), it did ge...


temperature sense diodes in Xilinx 7 series

Started by John Larkin in comp.arch.fpga4 months ago 6 replies

Has anybody used these? We have two FPGAs on a board, a Zynq and an Artix7. We want to use the internal ADCs to read chip temperatures. We...

Has anybody used these? We have two FPGAs on a board, a Zynq and an Artix7. We want to use the internal ADCs to read chip temperatures. We have been advised to ground the temp sense diode pins DXP and DXN "if they are not being used". Unless the XADC has a separate temp sense diode, seems to me that shorting the external diode pins might kill our ability to acquire temperature internall...


Two good FREE e-books about Ireland

Started by Anonymous in comp.arch.fpga5 months ago

http://www.rbduncan.com/Sean.htm http://www.rbduncan.com/TheTroubles.htm

http://www.rbduncan.com/Sean.htm http://www.rbduncan.com/TheTroubles.htm


The TOP Rule

Started by Anonymous in comp.arch.fpga5 months ago 2 replies

http://www.rbduncan.com/toprule.htm

http://www.rbduncan.com/toprule.htm


Intel (Altera) announces Cyclone-10

Started by GaborSzakacs in comp.arch.fpga5 months ago 13 replies

It looks like Intel has learned to count from Microsoft. The previous generation of Cyclone was...

It looks like Intel has learned to count from Microsoft. The previous generation of Cyclone was Cyclone-5. https://www.altera.com/products/fpga/cyclone-series/cyclone-10.html -- Gabor


Plan to go to church Sunday

Started by Rick C. Hodgin in comp.arch.fpga5 months ago 1 reply

This message is for those who have a drawing from within to do so. I want you to know that drawing is from God. He is reaching out to you to...

This message is for those who have a drawing from within to do so. I want you to know that drawing is from God. He is reaching out to you to save your eternal soul from the judgment for sin. If you hear His call on the inside, then go to church on Sunday. Seek to learn more about this drawing, why it exists, and what it means to you. You know that have sinned. You know that you need t...


cmos delay vs temperature

Started by John Larkin in comp.arch.fpga5 months ago 3 replies

I found one old Fairchild appnote that has some numbers https://dl.dropboxusercontent.com/u/53724080/Parts/Logic/CMOS_Delay_Temp.pdf which...

I found one old Fairchild appnote that has some numbers https://dl.dropboxusercontent.com/u/53724080/Parts/Logic/CMOS_Delay_Temp.pdf which averages to around +3000 ppm/degC, or about +3 ps per ns of prop delay per degree C. That's with 50 pF loading, sorta high. This is HC, pretty old technology. I have a vague impression that the innards of a typical FPGA may be better. Here's a ri...


CFP: The International Journal of Applied Control, Electrical and Electronics Engineering (IJACEEE)

Started by allconferencecfplaerts ShareURL in comp.arch.fpga5 months ago

The International Journal of Applied Control, Electrical and Electronics Engineering (IJACEEE) ...

The International Journal of Applied Control, Electrical and Electronics Engineering (IJACEEE) ISSN : 2394 - 0816 Call for papers *************** The International Journal of Applied Control, Electrical and Electronics Engineering (IJACEEE) is an open access peer-reviewed journal...


All-real FFT for FPGA

Started by Tim Wescott in comp.arch.fpga5 months ago 34 replies

So, there are algorithms out there to perform an FFT on real data, that save (I think) roughly 2x the calculations of FFTs for complex...

So, there are algorithms out there to perform an FFT on real data, that save (I think) roughly 2x the calculations of FFTs for complex data. I did a quick search, but didn't find any that are made specifically for FPGAs. Was my search too quick, or are there no IP sources to do this? It would seem like a slam-dunk for Xilinx and Intel/Altera to include these algorithms in their FFT li...


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