Newbie: xilinx vs arm

Started by Anonymous in comp.arch.fpga12 years ago 4 replies

Hello, My knowledge on fpga field is almost zero. Ive got few questions. I would like to enter into fpga world. Ive thought about buying...

Hello, My knowledge on fpga field is almost zero. Ive got few questions. I would like to enter into fpga world. Ive thought about buying starter kit to start to play. Ive found few spartans boards and arm's. Whats the diffrence between them (development utils, hardware) ? Ive seen that arm has gnuarm and arm-linux, does it mean that I can program arm processor using C / C++ ? If yes ...


ARM C/C++ compiler independent of OS

Started by Kartik Krishnan in comp.arch.fpga14 years ago 1 reply
ARM

i want to use some ARM C/C++ compiler which is independent of the operating system. What i am looking for is plain translation of my C/C++...

i want to use some ARM C/C++ compiler which is independent of the operating system. What i am looking for is plain translation of my C/C++ benchmarking code into plain ARM assebly and then into binaries... if i use the ADS C/C++ compiler it generates some software interrupts which kinda throws everything off track... Did any one have the same problem before...? or shoudl i get started with ...


arm cortex M0 ds and legacy spartan 3E 3A 3ADSP starter kits

Started by rp p in comp.arch.fpga5 years ago 1 reply

hi folks, I am investigating for edu. purposes arm cortex M0 "design start edition" in legacy spartan3E1600 or 3adsp1800. Labs can't afford...

hi folks, I am investigating for edu. purposes arm cortex M0 "design start edition" in legacy spartan3E1600 or 3adsp1800. Labs can't afford new boards this year... I am especially interrested in ddr ram / (arm) ahb-lite wrapping : mig/mpmc xilinx tools dont have wizard for that bus, it shoud be doable, but tricky... is there something freely available ?? regards


Looking for a small ARM and/or IA32 based application

Started by khoa nguyen in comp.arch.fpga14 years ago
ARM

Hi, Im trying to implement the ARM and IA32 ISA on an fpga. Im looking for some small program to be testbenches for my ARM and IA32...

Hi, Im trying to implement the ARM and IA32 ISA on an fpga. Im looking for some small program to be testbenches for my ARM and IA32 fpga processor. The small program can either be asm or RBF or other source code, but I'd prefer asm because then I can check to see if I've implemented all the necessary instructions. Should any of you happen to have some around could you please direct me o...


--New-- ArmXF ARM+FPGA Blocks Development Platform

Started by Johan Galston in comp.arch.fpga13 years ago

APS has released its new APS-ArmXF FPGA Rapid Development Platform The APS-ArmXF Rapid Development Platform is a highly programmable FPGA and...

APS has released its new APS-ArmXF FPGA Rapid Development Platform The APS-ArmXF Rapid Development Platform is a highly programmable FPGA and ARM development system used for product development, product implementation, and algorithm testing, just to mention a few. The system includes one ARM-Block and up to 3 XF-Blocks along with software and ARM C, VHDL, and LINUX example code and te...


How to phase align a 10MHz clock using V4LX60 DCM

Started by subint in comp.arch.fpga11 years ago 4 replies

Hello, I am now working with new board based on ARM processor which is pluged on top of V4LX60 based board from avnet. But after the ARM...

Hello, I am now working with new board based on ARM processor which is pluged on top of V4LX60 based board from avnet. But after the ARM board is manufactured it is observed that the clock from the ARM is delayed compared to the other signals. Since redesign of the board is not possible i thought to advance the clock by 4ns using the DCM on the V4 board. But the problem is the clock...


PowerPC 405 Problem on Xilinx Virtex II FPGA

Started by Martin in comp.arch.fpga9 years ago

Hi all My goal was to transfer an Assembler implementation that was running on an ARM chip to the PowerPC 405 architecture on a Xilinx Virtex...

Hi all My goal was to transfer an Assembler implementation that was running on an ARM chip to the PowerPC 405 architecture on a Xilinx Virtex II Pro. In the meantime this is working but for some reason the PowerPC implementation is more than 10 times!!! slower than the ARM chip implementation. I can only think of 3 reasons: 1) In the ARM implementation I save 16 registers on the stack,...


ARM+FPGA

Started by SP in comp.arch.fpga14 years ago 1 reply

Hello, I am looking for an ARM (preferably StrongARM) w/ FPGA development board. StrongARM preference is for mainly for Linux. Any other...

Hello, I am looking for an ARM (preferably StrongARM) w/ FPGA development board. StrongARM preference is for mainly for Linux. Any other supported processor will do as well. Thanks a lot! -Sumeet


Open source ARM, Version 0.1

Started by Konrad Eisele in comp.arch.fpga14 years ago 1 reply

For those that are interested. A not yet finished synthesizable vhdl ARM model can be downloaded...

For those that are interested. A not yet finished synthesizable vhdl ARM model can be downloaded at: http://www.tamaki.de/data/vhdl.tar.gz Implemented as a Integer Unit in Gaisler Research's Leon-Soc. Note: Because I do not really know the licensing situation, download at your own risk.


problem in driving I2C bus through memory-mapped register

Started by Anonymous in comp.arch.fpga13 years ago 10 replies
ARM

Hi, I have an fpga which is accessed from ARM as a memory-mapped device. A register in fpga is used to drive a I2C bus connected...

Hi, I have an fpga which is accessed from ARM as a memory-mapped device. A register in fpga is used to drive a I2C bus connected to a device . Two bits in the register represent clock and data lines of the bus. When I try to write into this register from ARM software as shown below, write is not happening. ARM is running at 48 Mhz. int* reg = 0x44400030; *reg = 0x3; T...


patent free ARM cores

Started by Antti in comp.arch.fpga8 years ago 8 replies
ARM

Hi I wonder if there ary another patent free implementation of ARM cores excpet the Pollex series http://www.r-and-d.de/ Antti

Hi I wonder if there ary another patent free implementation of ARM cores excpet the Pollex series http://www.r-and-d.de/ Antti


ARM Cortex for Altera available

Started by Antti in comp.arch.fpga10 years ago 2 replies

Hi looks like ARM is easing up Cortex licensing, so it is no only available for M1 enabled Actel but pretty much ALL FPGA vendors, available...

Hi looks like ARM is easing up Cortex licensing, so it is no only available for M1 enabled Actel but pretty much ALL FPGA vendors, available at the moment however seems to be only Altera Cyclone III version distributed by Arrow for 2500 for the devkit 1 year license and license to distribute 1000 copies Antti


[newbie] How to get the value of active pins through JTAG

Started by C...T in comp.arch.fpga14 years ago

My advisor assigned me a problem which is to monitor the value of active pins of an ARM processor which will run a embedded OS. The ARM...

My advisor assigned me a problem which is to monitor the value of active pins of an ARM processor which will run a embedded OS. The ARM processor is on an evaluation board - amtel eb63 and the OS is dos-like. I have wiggler in hand. Boss's idea is using the boundary-scan to get the value while the OS is running. Please tell me if it is possible to do this and what I should do or learn to ...


Arm clone version 0_8

Started by Konrad Eisele in comp.arch.fpga14 years ago

Update: version_0.8 of the not yet finished synthesizable vhdl ARM model is ready. Slowly but shurely we aproach a working version. It takes...

Update: version_0.8 of the not yet finished synthesizable vhdl ARM model is ready. Slowly but shurely we aproach a working version. It takes longer than expected... Update: version_0.8 snap: http://www.tamaki.de/data/vhdl_06_04_2004.tar.gz


Microsemi FPGAs

Started by John Larkin in comp.arch.fpga3 months ago 3 replies

Has anyone used the Microsemi SOCs, the SmartFusion2 FPGAs with an ARM Cortex M3 on chip? How good/awful is the tool set? Any big likes or...

Has anyone used the Microsemi SOCs, the SmartFusion2 FPGAs with an ARM Cortex M3 on chip? How good/awful is the tool set? Any big likes or dislikes? They look like a pretty good deal for a medium FPGA with ARM. -- John Larkin Highland Technology, Inc lunatic fringe electronics


Open Source Arm core version_0.5

Started by Konrad Eisele in comp.arch.fpga14 years ago

Update: version_0.5 of the not yet finished synthesizable vhdl ARM model is ready. Slowly but shurely we aproach a working version. First full...

Update: version_0.5 of the not yet finished synthesizable vhdl ARM model is ready. Slowly but shurely we aproach a working version. First full release is now sheduled for March. Update: version_0.5 goto: http://www.l8arm.org/armiu.html


ARM Emulator

Started by morpheus in comp.arch.fpga12 years ago 2 replies

Hi, Does anyone have an idea if there is a free ARM emulator out there. We have GHS in house...but the s'ware guys don't have an extra license...

Hi, Does anyone have an idea if there is a free ARM emulator out there. We have GHS in house...but the s'ware guys don't have an extra license for me...huffffff Anyways, I am designing a cpld which is memory mapped with a PXA 255 and I need to prove out memory map architecture....I know I can simulate but I derive more pleasure by checking chip selects for peripherals on the scope....deligh...


FPGA ARM IP Core

Started by Antti Lukats in comp.arch.fpga12 years ago 3 replies

Hi Group, from "Actel is bringing ARM7 to the masses with no upfront licensing fees and no royalties" - this is totally nonsense! I have...

Hi Group, from "Actel is bringing ARM7 to the masses with no upfront licensing fees and no royalties" - this is totally nonsense! I have been trying to buy 1 sample ARM7 ready device from Actel for some time now, calling them and asking all over again. They claim that ARM ready PA3 silicon is available, but pricing? As soon as I try to ask the prices they will start to explain the li...


Vertex-II configuration in slave SelectMap mode

Started by Jay in comp.arch.fpga14 years ago
ARM

Hi all, I'm trying to configur my FPGA with the ARM, and controlled CCLK is used (/WE of ARM). After loading configur data, there still a...

Hi all, I'm trying to configur my FPGA with the ARM, and controlled CCLK is used (/WE of ARM). After loading configur data, there still a Startup process needs a clock. Do I need an extra free running clock, and instantiate the start-up module to complete the startup process?


Internship/Co-op

Started by KaRtiK in comp.arch.fpga14 years ago

Hello I had posted once before in July Sorry to spam the group again. I am looking for an internship/Co-op for Spring 2004 in the field...

Hello I had posted once before in July Sorry to spam the group again. I am looking for an internship/Co-op for Spring 2004 in the field of FPGA /ASIC design, computer architecture design. I am a grad student in Comp Engg at UW-Madison. Over the last 5 months I have designed completely in Verilog 2 ARM cores.(a super scalar version and a basic 5 stage pipelined ARM core) as part of ...