Minford Altera FPGA CPLD Byteblaster Downloader

Started by James Wang in comp.arch.fpga17 years ago

Hi Friends, We are making Altera FPGA and CPLD downloader ByteBlaster. It can replace Altera ByteBlaster and ByteBlaster MV directly...

Hi Friends, We are making Altera FPGA and CPLD downloader ByteBlaster. It can replace Altera ByteBlaster and ByteBlaster MV directly to program/configure various Altera PLD devices, reliable and affordable with a very low price. We also sell FPGA demo board. For detail information or buy on-line, please check at http://www.minford.ca. Thanks, James Wang Minford Technology E-mail: i...


Altera flash FPGA with ColdFire hard core

Started by Antti in comp.arch.fpga12 years ago

there will be no MAX-III, and how the "followup" Flash FPGA/CPLD from Altera would be is something mr B from Altera didnt really want to reveal...

there will be no MAX-III, and how the "followup" Flash FPGA/CPLD from Altera would be is something mr B from Altera didnt really want to reveal at Embedded... But after checking out the FREE ColdFire v1 core that can be fully integrated with SOPC, and is completly free for Cyclone III, I can now belive that that the new Altera Flash FPGA will really have hardened ColdFire core. I just hope...


Altera Programming Cables and EPCS16/64

Started by CloneNumber66 in comp.arch.fpga16 years ago

Hi, I am trying to decide which Altera programming cable to purchase. Can anyone tell me how long it takes them to program an Altera...

Hi, I am trying to decide which Altera programming cable to purchase. Can anyone tell me how long it takes them to program an Altera EPCS16 and/or EPCS64 using the USB Blaster and/or ByteBlaster II? So I can do an apples-to-apples comparison: approximately how big is the configuration file and what's the processor speed of your host computer? Thanks!


Implementing a two-modulus PLL divider in Altera Stratix II

Started by Markus Kuhn in comp.arch.fpga16 years ago 5 replies

I am trying to use one of the enhanced PLLs in an Altera Stratix II (EP2S60F1020C4) on the Altera DSP Development board in order to synthesize...

I am trying to use one of the enhanced PLLs in an Altera Stratix II (EP2S60F1020C4) on the Altera DSP Development board in order to synthesize from a 100 MHz input clock frequencies new clock frequencies in the range 20-150 MHz. The critical bit is: I need a frequency resolution of not more than 0.01 Hz, which is obviously not feasible with the built-in 9-bit PLL dividers. I am therefore ...


Altera configuring/programming for FLEX10KE with EPC2 - sof or pof?

Started by Anonymous in comp.arch.fpga15 years ago 2 replies

I want to configure/program an Altera FLEX EPF10K30ETC144-3 + EPC2LC20 using files I've generated using Quartus for the same devices. I want to...

I want to configure/program an Altera FLEX EPF10K30ETC144-3 + EPC2LC20 using files I've generated using Quartus for the same devices. I want to use JTAG to interface to the devices using my ByteBlaster II. I have carefully followed all Altera directions in generating the files and designing the circuit with the devices on a PCB. My 2 questions are: 1) What is the difference between "configu...


Downloading Nios II Eval from Altera website

Started by in comp.arch.fpga16 years ago

Hi Sirs, For two days n a row, I've been trying to download Nios II Eval from Altera website, starting from...

Hi Sirs, For two days n a row, I've been trying to download Nios II Eval from Altera website, starting from here: https://www.altera.com/support/software/download/nios2/dnl-nios2.jsp Or from here: https://www.altera.com/support/software/download/altera_design/quartus_we/dnl-quartus_we.jsp From either url, the link directs me to here: https://www.altera.com/servlet/download?swco...


Actel vs. Xilinx and Altera

Started by Joel Kolstad in comp.arch.fpga16 years ago 3 replies

Hi, It's been a couple of years since I've been a heavy FPGA user, but it appears that I'll now be getting back into them. As of a few years...

Hi, It's been a couple of years since I've been a heavy FPGA user, but it appears that I'll now be getting back into them. As of a few years back, I was using Xilinx Virtex IIe parts and was quite happy with them... I kept up with what Altera was doing as well, and while it always seemed to me that for DSP applications Xilinx tended to have the edge, in many ways Xilnx and Altera were the...


Where to find the Altera Schematic

Started by Binary in comp.arch.fpga16 years ago 2 replies

Hi all, I want to buy some chips of Altera Cyclone to do some experiments, but before I proceed, I can't find any reference desing/smallest...

Hi all, I want to buy some chips of Altera Cyclone to do some experiments, but before I proceed, I can't find any reference desing/smallest system available on Altera's website. For example, the datasheet doesn't include the smallest system for me to run with! Anyone can tell me how to find it? Thanks in advance. ABAI


Xilinx and Altera Modelsim on the same PC?

Started by Sean in comp.arch.fpga17 years ago

Hi all, I've been using Altera parts and tools for quite a while and currently have Quartus-II 4.1 on my PC along with the Modelsim-Altera...

Hi all, I've been using Altera parts and tools for quite a while and currently have Quartus-II 4.1 on my PC along with the Modelsim-Altera 5.8c. Now I need to do a Virtex-II design so I obviously need to put some Xilinx software on the PC. I've used Xilinx devices and tools before (not the newest ISE, but a pretty old version of Foundation I think and the earlier Webpacks). Anyway, I...


Clock problem? Altera Stratix-II ES and MP

Started by Tomoya in comp.arch.fpga16 years ago 2 replies

Hi, all. This is Tomoya greeting from Japan. I would like to hear about Altera Stratix-II ES(engineering sample)/MP(mass production)...

Hi, all. This is Tomoya greeting from Japan. I would like to hear about Altera Stratix-II ES(engineering sample)/MP(mass production) differences. Here is background of our isse (we're facing); We'd made three DDR evaluation boards using Altera Stratix-II EP2S180/130. It has DDR interface, DDR memories, and many IOs (GPIO: General purpose IO). At first, we used EP2S180/130ES (engineer...


Old School Altera MAX 7000

Started by Gerry_MAN in comp.arch.fpga12 years ago 6 replies

Hi Folks, I'm a student and electronics hobbyist. I've been collecting various old Altera MAX 7000 related programmers, more as a hobby than...

Hi Folks, I'm a student and electronics hobbyist. I've been collecting various old Altera MAX 7000 related programmers, more as a hobby than anything. And I realize this is old school so no worries, I'm just into the vintage electronics. :) I've been searching the net for the Altera LP6 logic programming card, part of the ASAP2 MPU. Image link below: http://www.digital-circuitry.com/F...


Altera LP4 Need Help With Device Drivers and Setting Up

Started by Derek Simmons in comp.arch.fpga17 years ago 3 replies

I have an Altera LP4 ISA interface board I'm trying to setup to use with MAX+plus II 9.23. What device drivers do I need to install to use this...

I have an Altera LP4 ISA interface board I'm trying to setup to use with MAX+plus II 9.23. What device drivers do I need to install to use this board? Will the LP6 Drivers work? There are also some DIP switches on it. Does anybody know what the set or control? I have the pod and I'm going to try to program Altera EPM7256EGC192. Does anybody know if there is any reason this combination of...


A newbie question (Xilinx or Altera Env?)

Started by Nirav Raval in comp.arch.fpga16 years ago 2 replies

Hello, I am interested in learning fpga. I want advice on which software/HW dev board should I pick. I have downloaded eval copies of Altera,...

Hello, I am interested in learning fpga. I want advice on which software/HW dev board should I pick. I have downloaded eval copies of Altera, Xilinx and Aldec. I am playing around with each to decide which I should stick too and now planning to buy a H/W borad I am also interested in embedded RTOS/ soft core procesors, DSP and communications area. Altera has Nios and Xlinx has Picobla...


way to go Altera!

Started by Antti in comp.arch.fpga12 years ago 3 replies

A while ago i did some research related to capacitive touch sensing, and was really surprised to see that this function is offered by Altera as...

A while ago i did some research related to capacitive touch sensing, and was really surprised to see that this function is offered by Altera as ready made solution. today i was looking at ambient light measurement solutions. and on the first google search page i found this http://www.altera.com/literature/wp/wp-01076-led-driver-reduces-power-adjusting-intensity-ambien t-light.pdf cool.


Update contacts at Altera

Started by Jedi in comp.arch.fpga16 years ago 4 replies

Moro Back from a successful trip in .ch I have to change my contact details at Altera and they provide an email address for doing...

Moro Back from a successful trip in .ch I have to change my contact details at Altera and they provide an email address for doing this: csecom@altera.com which just leads into nirvana and bounces back with "user unknown"... Any other address to use? Or why is it not allowed to change address online? rick


Altera Max II

Started by makmorbi in comp.arch.fpga17 years ago 2 replies

Hi I wanted to know if Altera Max II was shipping. Altera's website says it is shipping but do not know if the EPM570 is shipping. Any news...

Hi I wanted to know if Altera Max II was shipping. Altera's website says it is shipping but do not know if the EPM570 is shipping. Any news about it? Thanks


DDR2 FPGA PWB SIMULATION

Started by Jerry in comp.arch.fpga16 years ago

Greetings, We are doing a design that uses an Altera Cyclone II to drive three DDR2 memory chips. Looking at reference designs from Altera, TI...

Greetings, We are doing a design that uses an Altera Cyclone II to drive three DDR2 memory chips. Looking at reference designs from Altera, TI and another company the terminations run the spectrum from series parallel (Altera), just series (TI) to no resistor termination (the other company). So my questions are to those designers who have DDR2 interface experience are: 1. What kind of...


Can Xilinx and Altera be on the same JTAG chain for programming?

Started by Dale in comp.arch.fpga14 years ago 1 reply

If I put a Xilinx SysAce and two Altera Stratix II FPGAs on the same JTAG chain, will I be able to program the two Altera parts with Quartus and...

If I put a Xilinx SysAce and two Altera Stratix II FPGAs on the same JTAG chain, will I be able to program the two Altera parts with Quartus and the SysAce with impact? If so, will it work as it ordinarily would or do I need to do something to put the other devices in bypass mode? Thanks, Dale


Programmimg Altera serial configuration devices

Started by Ben Popoola in comp.arch.fpga18 years ago 2 replies

Hi, Does anyone have a schematic for the Altera byteblaster II cable or has anyone developed a programmer for programming the ALtera...

Hi, Does anyone have a schematic for the Altera byteblaster II cable or has anyone developed a programmer for programming the ALtera EPCS1/4 family of serial configuration devices. I am designing a board and I want to design the programmer into the system. Regards Ben


New Application Note: Multiple configurations for Altera FPGAs

Started by Bert_Paris in comp.arch.fpga11 years ago 5 replies

Hi, After seeing a number of customers struggling with this issue, I have written a detailed ApNote showing how to implement a multiple...

Hi, After seeing a number of customers struggling with this issue, I have written a detailed ApNote showing how to implement a multiple configuration system for Altera FPGAs. The example is a Cyclone III using Active Serial mode / EPCS (on a DE0 board), but it is easily translatable to any other Altera FPGA/board. It is not complex, but getting everything right from the documentation ...