Minford MF160 FPGA and CPLD Downloader -- Replace for Altera ByteBlaster II

Started by James Wang in comp.arch.fpga16 years ago

Hi Friends, Minford Technology has FPGA and CPLD downloader, it can replace Altera ByteBlaster II directly and work in AS mode, PS mode, JTAG...

Hi Friends, Minford Technology has FPGA and CPLD downloader, it can replace Altera ByteBlaster II directly and work in AS mode, PS mode, JTAG mode. It supports all Altera FPGA, CPLD and configuration devices (EPC, EPCS1 and EPCS4). For more technical or ordering information, please visit us at http://www.minford.ca, we ship our products worldwide. Sincerely, James Wang Minford...


Where to buy cheap MAXII CPLD?

Started by Zimmer in comp.arch.fpga16 years ago 7 replies

Hi Everyone, Can anybody let me know where to buy the EPM1270 TQFP CPLD in a cheap price? I've checked altera.com, the online wholesale price...

Hi Everyone, Can anybody let me know where to buy the EPM1270 TQFP CPLD in a cheap price? I've checked altera.com, the online wholesale price is $4.25/pc for 500K units. But the distributor here would charge me over $24 for 10 pc. (ebay.com is not a good site for the stable supply) Any advice appreciated! -Zimmer


VGA signal generator using CPLD

Started by RF in comp.arch.fpga16 years ago 2 replies

Hello, I am new with CPLD and Verilog. I have made some code and posted on comp.lang.verilog but nobody responded. I need help. I don't...

Hello, I am new with CPLD and Verilog. I have made some code and posted on comp.lang.verilog but nobody responded. I need help. I don't know if this code works. I don't know how to make a test module. (I am using ISE Webpack 4.2 and MXE). Thanks. --- http://www.terra.es/personal9/listaco/VGAsignal.html (Project) Here goes: ====================================================...


Minford MF160 FPGA and CPLD Downloader -- Replace for Altera ByteBlaster II

Started by James Wang in comp.arch.fpga16 years ago

Hi Friends, Minford Technology has Altera FPGA and CPLD downloader, it can replace Altera ByteBlaster II directly and work in AS mode, PS...

Hi Friends, Minford Technology has Altera FPGA and CPLD downloader, it can replace Altera ByteBlaster II directly and work in AS mode, PS mode, JTAG mode. It supports all Altera FPGA, CPLD and configuration devices (EPC, EPCS1 and EPCS4). For more technical or ordering information, please visit us at www.minford.ca, we ship our products worldwide. Very low price compared with Altera ...


Minford MF160 FPGA and CPLD Downloader -- Replace for Altera ByteBlaster II

Started by James Wang in comp.arch.fpga16 years ago

Hi Friends, Minford Technology has Altera FPGA and CPLD downloader, it can replace Altera ByteBlaster II directly and work in AS mode, PS...

Hi Friends, Minford Technology has Altera FPGA and CPLD downloader, it can replace Altera ByteBlaster II directly and work in AS mode, PS mode, JTAG mode. It supports all Altera FPGA, CPLD and configuration devices (EPC, EPCS1 and EPCS4). For more technical or ordering information, please visit us at www.minford.ca, we ship our products worldwide. Very low price compared with Altera ...


Replace for Altera ByteBlaster II -- Minford MF160 FPGA and CPLD Downloader

Started by James Wang in comp.arch.fpga16 years ago

Hi Friends, Minford Technology has Altera FPGA and CPLD downloader, it can replace Altera ByteBlaster II directly and work in AS mode, PS...

Hi Friends, Minford Technology has Altera FPGA and CPLD downloader, it can replace Altera ByteBlaster II directly and work in AS mode, PS mode, JTAG mode. It supports all Altera FPGA, CPLD and configuration devices (EPC, EPCS1 and EPCS4). For more technical or ordering information, please visit us at www.minford.ca, we ship our products worldwide. Very low price compared with Altera ...


Xilinx XC9500 CPLD Wired-OR; Wired-ND

Started by Bruno Cardeira in comp.arch.fpga17 years ago 6 replies

Hello, does anyone know if it is possible to connect several Xilinx XC9536 CPLD output pins in a Wired-OR configuration? If possible, how can I...

Hello, does anyone know if it is possible to connect several Xilinx XC9536 CPLD output pins in a Wired-OR configuration? If possible, how can I do it in VHDL? Thanks Best Regards Bruno


5 V inputs to 3.3 V CPLD

Started by Matt Cohen in comp.arch.fpga17 years ago 4 replies

I'm working on a design with a Xilinx XC95XL series CPLD. The inputs would be coming from a system with a 5 V (possibly higher, I don't have...

I'm working on a design with a Xilinx XC95XL series CPLD. The inputs would be coming from a system with a 5 V (possibly higher, I don't have the exact number yet) output. I need 3.3 V outputs, so using the separate I/O power supply is not a good solution. As a novice engineer, I have a few ideas, but don't know which is best. Is there a problem with using a simple resistor divider to crea...


dumb question CPLD or FPGA

Started by Joseph Goldburg in comp.arch.fpga17 years ago 2 replies

What's the difference between say the Xilinx Coolrunner CPLD and the Xilinx 4000 FPGA series. I noticed the coolrunner dev kit for $50...

What's the difference between say the Xilinx Coolrunner CPLD and the Xilinx 4000 FPGA series. I noticed the coolrunner dev kit for $50 USD Please reply to this new group and wizard1@netspace.net.au Thanks in advance Joseph


I am new and I want to help

Started by serdar in comp.arch.fpga17 years ago 2 replies

Hi, I am new CPLD and FPGA. Should I start Xilinx devices or ALTERA devices? and verilog or VHDL? I think buy a CPLD starter board.(CoolRunner...

Hi, I am new CPLD and FPGA. Should I start Xilinx devices or ALTERA devices? and verilog or VHDL? I think buy a CPLD starter board.(CoolRunner II Design Kit or MAX 7000 Quick Start Development Kit) Can you recommended any board for starting?


Xilinx CPLD programming tool under Linux

Started by Habib Bouaziz-Viallet in comp.arch.fpga13 years ago 7 replies

Hi all ! I'm wondering if a basic tool already exist to program Xilinx CPLD (XC95144 and so) under Linux (preferably with the old Parralle...

Hi all ! I'm wondering if a basic tool already exist to program Xilinx CPLD (XC95144 and so) under Linux (preferably with the old Parralle cable III) Thanks, Habib. -- HBV


cheapest CPLD

Started by Anonymous in comp.arch.fpga16 years ago 3 replies

Hi all Does anyone know what is the cheapest 3.3V CPLD available? My desing uses 31 macrocells, and 33 I/O. Currently using Xilinx XC9536XL...

Hi all Does anyone know what is the cheapest 3.3V CPLD available? My desing uses 31 macrocells, and 33 I/O. Currently using Xilinx XC9536XL available for around US$0.70 a piece (for 100k quantities). The design is pretty slow GCK~2MHz. I need 100k+ quantities. Thanks ZK


Spartan-3 -> Spartan-2 problem

Started by aleksa in comp.arch.fpga12 years ago

About two months ago I've started learning VHDL, CPLD and FPGA. Right from the start I've choosen Spartan-3 (XC3S50) and didn't look at...

About two months ago I've started learning VHDL, CPLD and FPGA. Right from the start I've choosen Spartan-3 (XC3S50) and didn't look at Spartan-II because I wanted to use the latest chip. Now I am making a board with 50 5V TTL inputs and idea was to use the CPLD XC95144XL as a level translator...but I just don't like it. So, now I am trying Spartan-II (XC2S50), which is 5V tolerant, an...


Processor in CPLD

Started by Rgr in comp.arch.fpga13 years ago 11 replies

Hi. I would like to hear your opinion on the possibility of implementing a processor in a CPLD? The functionality does not have to be...

Hi. I would like to hear your opinion on the possibility of implementing a processor in a CPLD? The functionality does not have to be greater than the old 8051 CPU, but I would like the flexibility and the possibility of adding additional logic to my design. Has someone worked on this issue, or have an opinion on how to complete this task? Looking forward to your replies Best Re...


CPLD + MCU SoC from Cypress, free samples too!

Started by Antti in comp.arch.fpga11 years ago 12 replies

both free samples and 49$ starterkit available, my should be airborn right now somewhere between Paris and my place. The CPLD is small, 190MC,...

both free samples and 49$ starterkit available, my should be airborn right now somewhere between Paris and my place. The CPLD is small, 190MC, but it still much more then the 16MC availabel in ADI's ADuCs or ST's uPSD devices. PSoC 5, Cortex based devices will probably only be available next year Antti


isp Cable for Lattice CPLD

Started by Mario Ivancic in comp.arch.fpga17 years ago 5 replies

Hi! I would like to build isp cable for lattice CPLD (ispLSI 1016), but I don't know how. Can you help me? Best Regards, ...

Hi! I would like to build isp cable for lattice CPLD (ispLSI 1016), but I don't know how. Can you help me? Best Regards, Mario


XPLA3 coolrunner programming tool?

Started by Didi in comp.arch.fpga11 years ago 17 replies

Some time ago I managed to get (under NDA) the programming info from Xilinx so now I can program one of their coolrunners via JTAG with...

Some time ago I managed to get (under NDA) the programming info from Xilinx so now I can program one of their coolrunners via JTAG with my toolchain (the CPLD on this design is reprogrammable over the net, i.e. the board CPU does its JTAG access etc.). I am now getting to what should be the easy part - writing the CPLD source to produce some (very simple) logic in a jedec file, after wh...


CPLD Jitter

Started by Andrew Holme in comp.arch.fpga15 years ago 20 replies

The dividers and the phase detector of my experimental frequency synthesizer are implemented in a 15ns Altera MAX7000S CPLD. I've tried...

The dividers and the phase detector of my experimental frequency synthesizer are implemented in a 15ns Altera MAX7000S CPLD. I've tried different multiplication factors (kN) to see how the close-in phase noise varies. At a 1 KHz offset, I get: -82 dBc/Hz for N=198 (VCO=19.8 MHz, comparison freq = 100 KHz) -95 dBc/Hz for N=39 (VCO=19.5 MHz, comparison freq = 500 KHz) Calculating the equ...


delays in XC95144XL CPLD

Started by David Fejes in comp.arch.fpga12 years ago 8 replies

Hello, I want to use the XC95144XL CPLD to switching paralell video buses up to 165Mhz frequency. The logic has only combinatorial parts and...

Hello, I want to use the XC95144XL CPLD to switching paralell video buses up to 165Mhz frequency. The logic has only combinatorial parts and there are no feedbacks from the macrocells output to the FastConnectII inputs. It's very important that the signals must have the same delays but I'm a bit confused with the delays and the timing modells. I don't use registers or any feedback in my...


Newbie VHDL issue with CPLD

Started by David T. in comp.arch.fpga17 years ago 3 replies

I am trying to use a CPLD as a bus decoder and also have the device latch 6 bits of data back to the host via a shared data bus. I cannot get...

I am trying to use a CPLD as a bus decoder and also have the device latch 6 bits of data back to the host via a shared data bus. I cannot get this code to simulate, using Xilinx Webpack. I have asked the local Xilinx FAE for help but he is not versed in VHDL. This can't be as difficult as it seems... nobody would be using these devices. I am getting the following signal for most all of the si...