Cyclone FPGA as Cardbus controller

Started by Marc in comp.arch.fpga17 years ago

Hello, I am thinking about using a Cyclone FPGA as Cardbus controller. With PCI I know that the Cyclone FPGA is working without problems,...

Hello, I am thinking about using a Cyclone FPGA as Cardbus controller. With PCI I know that the Cyclone FPGA is working without problems, but what about the Cardbus specific requirements (or differences to PCI), e.g. power-up current, configuration time, ... Has anybody experiences with it?!??!? Thanks, Marc


Small memories in Cyclone

Started by MikeF in comp.arch.fpga14 years ago 3 replies

Hi I am about to start on a design that will need a number of smallish memories. i.e. 8 deep x 16 wide shift registers, small FIFOs etc. I...

Hi I am about to start on a design that will need a number of smallish memories. i.e. 8 deep x 16 wide shift registers, small FIFOs etc. I am looking at the Spartan 3E and Cyclone II/III. The distributed memories in the Spartan 3E seem like the clincher. Why would I use a Cyclone and either waste a block RAM or quite a few Logic Elements when I can use distributed RAM in the S3E? The Cyc...


How to download bitstream into Cyclone III starter board

Started by shivashankara in comp.arch.fpga13 years ago 3 replies

Hi All, I am migrating from Spartan 3e to Cyclone III. We bought only cyclone III starter board. We don't have any USB blaster download cable. I...

Hi All, I am migrating from Spartan 3e to Cyclone III. We bought only cyclone III starter board. We don't have any USB blaster download cable. I devloped the my current design. Now i want to download into FPGA using USB cable. What are the steps to follow? regards, S Shankaran


Custom timing on Altera Cyclone V GX dev board

Started by Rick C. Hodgin in comp.arch.fpga4 years ago 10 replies

I have a "Cyclone V GX Starter Board," with an Altera Cyclone V GX 5CGXFC5CF27C7N. I've designed a logic layout for a video card that only...

I have a "Cyclone V GX Starter Board," with an Altera Cyclone V GX 5CGXFC5CF27C7N. I've designed a logic layout for a video card that only does SVGA output in graphics modes, and particularly only 1024 x 768 x 75 Hz refresh rate right now. I've developed a custom protocol for using single bytes per pixel, and a palette of 256 colors from a possible range of 4,096 colors. ----- I've g...


PLL Clocks on Cyclone Devices

Started by Jock in comp.arch.fpga17 years ago 2 replies

Can a Cyclone PLL accept a clipped sine wave with an amplitude of 0.8V - i.e. what is the maximum rise time on the edge of the PLL clock input?

Can a Cyclone PLL accept a clipped sine wave with an amplitude of 0.8V - i.e. what is the maximum rise time on the edge of the PLL clock input?


Why is Spartan-3 more expensive than Cyclone?

Started by Anonymous in comp.arch.fpga15 years ago 5 replies

Hi everyone, I compared the prices of two FPGAs from Digikey (http://www.digikey.com): +) Xilinx Spartan-3, XC3S1000 - 4FTG256C with LC:1920,...

Hi everyone, I compared the prices of two FPGAs from Digikey (http://www.digikey.com): +) Xilinx Spartan-3, XC3S1000 - 4FTG256C with LC:1920, I/O pins:173. Price: 47.87$ +) Altera Cyclone, EP1C6Q240C8N - ND with LC:5980, I/O pins:185. Price: 18.9$ Im relativly new to the FPGA world, but given the larger numbers of LC's and I/O pins that cyclone has, I don't understand why spartan-3 ...


Cyclone 3 on chip termination

Started by Dolphin in comp.arch.fpga13 years ago 8 replies

Hi, I am drawing schematics for a new system that uses a Cyclone 3 FPGA. I have some LVTTL (3V3) signals on which I would like to use a...

Hi, I am drawing schematics for a new system that uses a Cyclone 3 FPGA. I have some LVTTL (3V3) signals on which I would like to use a 50R series termination. The Cyclone 3 has two possible 50R series terminations: - not calibrated - calibrated The handbook doesn't specify the standards that can be used with the calibrated termination. Has anybody got this data? The handbook mentions t...


Altera Cyclone II DQ/DQS pins location

Started by Anonymous in comp.arch.fpga15 years ago 4 replies

Hello group, I have an issue with porting my high-speed DDR interface to Altera Cyclone II device. As far as datasheet says, Altera Cyclone II...

Hello group, I have an issue with porting my high-speed DDR interface to Altera Cyclone II device. As far as datasheet says, Altera Cyclone II device does not have any dedicated circuitry to support DDR signaling in its Input/Output blocks for DQ pins. The only thing present in hardware is the clock delay circuitry on DQS pins. All other DDR logic is implemented using LUT's and triggers fr...


NIOS II / Cyclone II - Multiply, Barrel Shift and Divide

Started by Jon Beniston in comp.arch.fpga17 years ago 1 reply

Hi, When targeting the Cyclone II, the NIOS II/f configuration in SOPC builder doesn't seem to list support for either...

Hi, When targeting the Cyclone II, the NIOS II/f configuration in SOPC builder doesn't seem to list support for either multipler, barrel-shifter or divide. Support for these only seems to be available when the target is a Stratix device. Is this correct? Is it not possible to get h/w multiply support on the Cyclone II? I'm using the eval version of NIOS II. Cheers, Jon


Cyclone PLL

Started by KKay in comp.arch.fpga15 years ago 1 reply

Hi all, I'm new in this field. Please guide me how can I proceed to implement the cyclone altpll megafunction in my own design. I...

Hi all, I'm new in this field. Please guide me how can I proceed to implement the cyclone altpll megafunction in my own design. I compiled individually PLL and my own design but could not able to link-up both. Please help me.


hi everyone, tell me something about Cyclone II.

Started by badgrant in comp.arch.fpga15 years ago 7 replies

hi, i'm grant, studying computer engineering in university of ottawa. i'm using altera cyclone II on up3 board with quartus II enviorment. how is...

hi, i'm grant, studying computer engineering in university of ottawa. i'm using altera cyclone II on up3 board with quartus II enviorment. how is it? is it leading in industry? what kind of job can i get when i'm done. guys, forgive me if i have tons of questions, coz i do care about my career while i know nothing about it right now. :p


JTAG vs. Passive Serial Config speed

Started by Kolja Waschk in comp.arch.fpga16 years ago 1 reply

Hi Is there a significant difference in the time it takes to download a configuration to an Altera Cyclone (EP1C6) using JTAG, vs. the...

Hi Is there a significant difference in the time it takes to download a configuration to an Altera Cyclone (EP1C6) using JTAG, vs. the Passive Serial Configuration method? In January, Greg Steinke here mentioned a program to program a Serial Configuration Device (e.g. EPCS1) _through_ a Cyclone, with the programmer attached only to the Cyclone's JTAG port. It was beta, then. Is this opt...


Altera Cyclone Programming device programming

Started by Rene Tschaggelar in comp.arch.fpga17 years ago 3 replies

The Altera Cyclone Programming device EPCS1 are shown to be programmed in the AS mode requiring an own connector. Since the JTAG was never...

The Altera Cyclone Programming device EPCS1 are shown to be programmed in the AS mode requiring an own connector. Since the JTAG was never officially declared outdated, I'd expect a way to program the cyclone plus the EPCS1 in JTAG mode. I wasn't able to find it yet though. Rene -- Ing.Buero R.Tschaggelar - http://www.ibrtses.com & commercial newsgroups - http://www.talkto.net


Min. Reqmts For Altera Nios -- i.e Will it work on Parallax Cyclone FastPack?

Started by Ben Nguyen in comp.arch.fpga17 years ago 1 reply

Is the 50 mhz EP1C3T100C7 Cyclone have enough resources (LE) to synthesize the nios? For example, this board doesnt have any memory, what kind...

Is the 50 mhz EP1C3T100C7 Cyclone have enough resources (LE) to synthesize the nios? For example, this board doesnt have any memory, what kind of limits will that put on the nios processor?


Control Panel application for Altera Cyclone II Starter Kit, help?

Started by mitshek in comp.arch.fpga14 years ago 2 replies

I'm using Altera's "Cyclone II Starter Kit", and while the board seems to work fine, I can't figure out one of the bundled utility...

I'm using Altera's "Cyclone II Starter Kit", and while the board seems to work fine, I can't figure out one of the bundled utility programs. I installed the Cyclone II Starter Kit CD on my Windows/XP machine. I'm able to use Quartus II 7.1 (web) to compile and then download projects to the board -- That works fine. However, I cannot get the "Control Panel - Starter II Kit" application ...


Cyclone device misteriously overheats

Started by Alex Somesan in comp.arch.fpga16 years ago 17 replies

Hello, This problem has been getting on my nerves for quite some time now. First of all I'll let you know that I'm an inexperienced engineer...

Hello, This problem has been getting on my nerves for quite some time now. First of all I'll let you know that I'm an inexperienced engineer - it's my first year in the field, so please bear with my inherent foolishness where applicable. Now to the point: I'm working on a design which uses the Altera Cyclone as a comm dispatcher/bridge/multiplexer between 3 Microchip PIC18F452, an FTDI 24...


cyclone config problem in my board

Started by kingkang in comp.arch.fpga17 years ago 1 reply

Hi I have made a cyclone board.But when I download with jtag in quartusII.It reached 80% and then said "Error: CONF_DONE pin failed to go high...

Hi I have made a cyclone board.But when I download with jtag in quartusII.It reached 80% and then said "Error: CONF_DONE pin failed to go high in device 1". How should I solve the problem?Thanks! Best Regards


types of FPGA

Started by ram in comp.arch.fpga14 years ago 1 reply

What are types of FPGA like antifuse ,sram based.what is difference under what category cyclone cyclone II device fall thanking you

What are types of FPGA like antifuse ,sram based.what is difference under what category cyclone cyclone II device fall thanking you


Altera Cyclone II EP2C20F484C6N

Started by jon in comp.arch.fpga12 years ago

I have 500 of the Altera Cyclone II EP2C20F484C6N these all new in original factory packaging. I no longer have a need for them and will let...

I have 500 of the Altera Cyclone II EP2C20F484C6N these all new in original factory packaging. I no longer have a need for them and will let them go for $40 each. Partial quantities ok. Thanks, Jon (949)864-7745


Which PCI core for Cyclone II board?

Started by Brian McFarland in comp.arch.fpga15 years ago 19 replies

Does anyone have experience with more than one of the PCI cores out there? I'm working a PCI card that's still in the early stages of...

Does anyone have experience with more than one of the PCI cores out there? I'm working a PCI card that's still in the early stages of the design. I'm hoping to be able to do pretty much everything on a single Altera FPGA - most likely a Cyclone II device. I've looked at the PCI Compiler from Altera. It seems very poorly documented, which I think will make the backend difficult to develop...