pin assignment on an expansion module

Started by adrian in comp.arch.fpga17 years ago 2 replies

Hello there, I have a Spartan-3 Starter Board with an ethernet module on one of the expansion ports and working with EDK 6.3. My intention...

Hello there, I have a Spartan-3 Starter Board with an ethernet module on one of the expansion ports and working with EDK 6.3. My intention is to use the ethernet module on my project to be able to send/recieve TCP/IP frames using lwIP but I'm not quite sure how to map the pins of the ethernet module to the pins of the expansion port for the design to work. How can this be done correct...


Breaking of Ethernet Frames

Started by Anonymous in comp.arch.fpga16 years ago 1 reply

Hi All, I am very new to the Ethernet area. I am trying to design and Implement an Ethernet switch or Multiplexer. so say if I am...

Hi All, I am very new to the Ethernet area. I am trying to design and Implement an Ethernet switch or Multiplexer. so say if I am bridging between two 1-gbps channels with one 2-gbps channel. when I think of designing a TDM switch between the 2 channels of 1 gbps my basic design will contain a MAC and a FIFO right...? I was thinking that if the incoming data frame is long so that ...


advantages of ethernet MAC ip core

Started by Martin in comp.arch.fpga18 years ago 14 replies

Hi all! Can someone tell me the advantages and disadvantages of an ethernet MAC core implemented in a FPGA for a System On Chip? Why to buy...

Hi all! Can someone tell me the advantages and disadvantages of an ethernet MAC core implemented in a FPGA for a System On Chip? Why to buy a lincese for several thousand dollar for an ethernet MAC core and there is also an external PHY chip on the board? There are also external chips which combine the MAC and the PHY layer. Thanks Martin


About the ethernet access on the ML310 board!

Started by more in comp.arch.fpga16 years ago

Hello I want to access the ethernet on the ML310 board to transfer dat to a PC and receive data from a PC. But I find the only way to...

Hello I want to access the ethernet on the ML310 board to transfer dat to a PC and receive data from a PC. But I find the only way to acces the ethernet is under the operating system. Then I chose Linux. Can directly create a c file in Linux and then compile and execute it? I that way, how can I download the bitstream from EDK to the board? I don't quite understand how to use Linu...


FPGA-CPU THROUG ETHERNET

Started by Pablo in comp.arch.fpga15 years ago 2 replies

Hi, I am trying to send messages from spartan 3e to pc via ethernet and viceversa. I have included opb_ethernet in the bsp design but at least I...

Hi, I am trying to send messages from spartan 3e to pc via ethernet and viceversa. I have included opb_ethernet in the bsp design but at least I don't know how to continue it. Any suggestion? Regard.


Send Ethernet traffic from an FPGA

Started by Jean Nicolle in comp.arch.fpga18 years ago 13 replies

I've published a 4-steps "recipe" on how to send traffic. The experiment should be easy to follow through. You need: 1. Any FPGA development...

I've published a 4-steps "recipe" on how to send traffic. The experiment should be easy to follow through. You need: 1. Any FPGA development board, with 2 free IOs and a 20 MHz clock. 2. A PC with an Ethernet card, and the TCP-IP stack installed. 3. Optionally, a network hub or switch. No Ethernet interface chip required. The Verilog source code (about 150 lines) is published here http...


Ethernet on Spartan 3A to send Data to PC

Started by dr_mckay in comp.arch.fpga13 years ago 1 reply

Hello, I have a Problem. I need a crashcours in using ethernet on a FPGA. I have the Xilinx Spartan-3A DSP Starter Kit and have to create a...

Hello, I have a Problem. I need a crashcours in using ethernet on a FPGA. I have the Xilinx Spartan-3A DSP Starter Kit and have to create a connection to a PC via Ethernet. My Problem is, I have ISE and EDK, but I have no idea, how to realize this connection. I couldn't find any Tutorial this way... I only want to send data to the PC. With 100MBit/s. Can you give me advises or links to a tut...


connecting FPGA with PC using ethernet MAC layer only

Started by jayantbala in comp.arch.fpga12 years ago 4 replies

hi all , My objective is to connect the XILINX S3A FPGA Board with PC using Ethernet .that is i want to send and receive data to/from ...

hi all , My objective is to connect the XILINX S3A FPGA Board with PC using Ethernet .that is i want to send and receive data to/from the PC. and after that i have to control other h/w of the board by sending data through ethernet as selected in GUI. but for this purpose i dont want to implement TCP/IP .i just simply want to send and receive MAC Packets ...


Ethernet / digital logic questions

Started by Hw in comp.arch.fpga16 years ago 7 replies

Ok, I'm not designing an Ethernet MAC but I see that people now make FPGA cores for this. I had a few "general" questions on how these...

Ok, I'm not designing an Ethernet MAC but I see that people now make FPGA cores for this. I had a few "general" questions on how these might be implemented. 1. I know Ethernet bits flow across as Manchester encoded data. I see that many of the cores run from a 25 MHz clock. How is the 125 Mbps (8/10 encoded data) serial stream generated without some sort of clock multiplicati...


Ethernet and Interrupts in Virtex II pro

Started by Surya in comp.arch.fpga13 years ago

Hello, Could any body tell me if i can use a OPB ethernet device in polled mode for sending and in interrupt mode for receiving packets from...

Hello, Could any body tell me if i can use a OPB ethernet device in polled mode for sending and in interrupt mode for receiving packets from the network. I am unable to do that. Why i am asking this? : When i use the ethernet ports in interrupt mode ( i have two of them), due to the priority i set in the interrupt controller, one of the ports always has a higher priority. Becau...


Ethernet on Altera FPGA: Help required

Started by renupriya in comp.arch.fpga12 years ago 1 reply

Hi ... I'm very new to working with altera and quartus.I'm working with NiOS II development board(Cyclone III EP3C25). I have to create a design...

Hi ... I'm very new to working with altera and quartus.I'm working with NiOS II development board(Cyclone III EP3C25). I have to create a design which has a NiOS processor, SRAM, Ethernet MAC and Ethernet Management Interface and other components.But the MAC and MI are custom components and not altera's IPs. I need to know how to instantiate these components in SOPC builder and I'm not aware ...


Sending and receiving of 10GBASE-R Ethernet frames via GTX transceivers in FPGA?

Started by Anonymous in comp.arch.fpga7 years ago 2 replies

Hi, I'm working on a code which is supposed to send and receive 10GBASE-R Ethernet frames via SFP+ modules connected to the GTX transceiver in...

Hi, I'm working on a code which is supposed to send and receive 10GBASE-R Ethernet frames via SFP+ modules connected to the GTX transceiver in a Kintex-7 FPGA. I've read the section 4 of 802.3-2012 standard and the ug476_7Series_Transceivers.pdf, but it still unclear to me how to send the correct Ethernet frame, directly driving the TX Gearbox of the GTX... As the core is supposed to be u...


FX12 mini module with EDK 10.1

Started by bhatti in comp.arch.fpga11 years ago

Hi every one I need to implement 100Mb ethernet connection on FX12 mini module for data transmission only. EDK 10.1 XPS Base System Builder...

Hi every one I need to implement 100Mb ethernet connection on FX12 mini module for data transmission only. EDK 10.1 XPS Base System Builder gives me two options for ethernet connection (using powerPC) for memec FX12 mini module development board. Either use XPS LL TEMAC or XPS ETHERNET LITE. Can anyone kindly tell me the differences b/w the two approaches? and what will be the most suita...


What is a PLD/FPGA with serial or Ethernet port logic or block built in

Started by LM in comp.arch.fpga10 years ago 19 replies

I am looking for a chip with somekind of communication port inbuilt. I am slowly planning a system where some data is sent from a computer to be...

I am looking for a chip with somekind of communication port inbuilt. I am slowly planning a system where some data is sent from a computer to be processed in the chip. Processing data is probably easy, but I prefer not to make a serial port my self and an ethernet port is too much. But an Ethernet port would be very nice to have. I would like to have a reasonably priced chip with low cos...


Small FPGA Dev Board with Ethernet

Started by Chris Murphy in comp.arch.fpga15 years ago 2 replies

Does anybody know of a good, --small--, development board with an ethernet port? What I'm really looking for is essentially a FPGA, on a very...

Does anybody know of a good, --small--, development board with an ethernet port? What I'm really looking for is essentially a FPGA, on a very small PCB, with an ethernet port and power port/headers. Some extra pins brought out to headers would be handy, but are not essential. While I'm dreaming, it needs to be something I could communicate to from linux, so proprietary / windows-only ether...


wishbone core with ethernet, hierarchy / architecture

Started by Anonymous in comp.arch.fpga16 years ago

Hello, I am pretty new to working with FPGAs and verilog in general but have a decent knowledge of programming, and Im trying to grasp the...

Hello, I am pretty new to working with FPGAs and verilog in general but have a decent knowledge of programming, and Im trying to grasp the whole concept of working with the wishbone, as well as verilog architecture. I have the wishbone commax core and the ethernet ip core from opencores.org, and im wondering how to go about setting up a basic system to have some ethernet communication coming...


Redundant Ethernet connection

Started by MM in comp.arch.fpga14 years ago 1 reply

Hi all, This is somewhat OT, but I am not sure where to ask... In a V4FX based system I need to come up with a way of having 2 ethernet...

Hi all, This is somewhat OT, but I am not sure where to ask... In a V4FX based system I need to come up with a way of having 2 ethernet connections to a backplane. The original plan was to use two TEMACs, each connected to an individual PHY. However, the device got pretty full and it is difficult now to add the support for the second TEMAC. Besides, it seems that all we really need is...


Altera free web FPGA software license question

Started by Anonymous in comp.arch.fpga17 years ago 11 replies

Hi list, I don't have ethernet connection though I do have an ethernet card installed. My computer can boot either with linux or win XP. I...

Hi list, I don't have ethernet connection though I do have an ethernet card installed. My computer can boot either with linux or win XP. I have dial up connection under linux only. I downloaded ALTERA software version 4.2 (yeah, overnight dialup), obtained the license (with an arbitrary ethernet number), and copied the files to windows partition and installed. The problem is now that un...


Ethernet & ML401

Started by Anonymous in comp.arch.fpga15 years ago 8 replies

Hi everybody! I would like to use the ethernet port on my ML401 development board (equipped with a Xilinx Virtex4 FPGA and Marvel Alaska 88e1111...

Hi everybody! I would like to use the ethernet port on my ML401 development board (equipped with a Xilinx Virtex4 FPGA and Marvel Alaska 88e1111 PHY), but I don't know what to do? Can you help me? Thanks, Max


ML300 Ethernet question.

Started by Nicholas Weaver in comp.arch.fpga17 years ago 1 reply

Has anyone on here used the ML300 with the Gigabit ethernet (1000-SX) multimode connectors? If so, what PCI/PCI-X/PCI-E NICs have you used on...

Has anyone on here used the ML300 with the Gigabit ethernet (1000-SX) multimode connectors? If so, what PCI/PCI-X/PCI-E NICs have you used on the PC side? Thanks. -- Nicholas C. Weaver nweaver@cs.berkeley.edu