FPGA for large HDMI switch

Started by David Brown in comp.arch.fpga4 years ago 15 replies

I am working on a project that will involve a large HDMI switch - up to 16 inputs and 16 outputs. We haven't yet decided on the...

I am working on a project that will involve a large HDMI switch - up to 16 inputs and 16 outputs. We haven't yet decided on the architecture, but one possibility is to use one or more FPGAs. The FPGAs won't be doing much other than the switch - there is no video processing going on. Each HDMI channel will be up to 3.4 Gbps (for HDMI 1.4), with 4 TMDS pairs (3 data and 1 clock). That mean...


FPGA Video processing board (HDMI).. who makes one?

Started by alangeering in comp.arch.fpga7 years ago 6 replies

Does anyone make the following: HDMI Receiver -> FPGA -> HDMI Transmitter I would considder DVI/Displayport also. I just want this for...

Does anyone make the following: HDMI Receiver -> FPGA -> HDMI Transmitter I would considder DVI/Displayport also. I just want this for video processing. I don't need audio, controls, PCIe, etc. I've seen some very large boards with HDMI daughter boards but they're way too large and unnecessary for just testing video algorithms. Thanks, Alan Geering --------------------


HDMI/TMDS source driver

Started by Nithin in comp.arch.fpga13 years ago

Hi I am looking for a HDMI source driver/transmission driver which would support 1920 X 1080 HDTV standard. I would appreciate be nice...

Hi I am looking for a HDMI source driver/transmission driver which would support 1920 X 1080 HDTV standard. I would appreciate be nice if somebody could send me the related links or manufacturer names. This for the HDMI digital video interface on a board. Thanks Nithin


Virtex 5 HDMI

Started by maxascent in comp.arch.fpga8 years ago 6 replies

I would like to implement a HDMI transmitter with a Virtex 5. Does anyone know if there is a chip that converts LVDS to TMDS? Thanks Jon

I would like to implement a HDMI transmitter with a Virtex 5. Does anyone know if there is a chip that converts LVDS to TMDS? Thanks Jon


DVI, HDMI, DisplayPort

Started by m in comp.arch.fpga8 years ago

I am looking for a solution to interface these standards into an FPGA (Virtex5). In an ideal world I would like a single-chip RX that supports...

I am looking for a solution to interface these standards into an FPGA (Virtex5). In an ideal world I would like a single-chip RX that supports all three standards (three inputs and one output bus to the FPGA). I am fairly certain that this can be done with a two chip solution: Multi-input DVI/HDMI RX and a DisplayPort to HDMI translator on one of those inputs. I am hoping that someone mi...


FPGA + HDMI 1080P

Started by johnp in comp.arch.fpga5 years ago 3 replies

I'm looking for a FPGA board that can support HDMI/DVI 1080P in/out. I'd like to avoid building my own, I'm probably looking at a volume of 100...

I'm looking for a FPGA board that can support HDMI/DVI 1080P in/out. I'd like to avoid building my own, I'm probably looking at a volume of 100 units. Any thoughts/suggestions? Thanks! John P


Serial LVDS ADC to spartan6

Started by Thomas Heller in comp.arch.fpga5 years ago 2 replies

I have to connect a dual 12-bit ADC with serial LVDS outputs (2-lanes per converter) to a spartan 6 FPGA. It would be ideal if I can use a...

I have to connect a dual 12-bit ADC with serial LVDS outputs (2-lanes per converter) to a spartan 6 FPGA. It would be ideal if I can use a single HDMI connector for this. The converters I'd like to use are the ADS6224 or ADC12S105, running at 100 MHz sample rate. They have 6 data LVDS data outputs: 4 data lines, 1 frame clock and 1 bit clock. Since the HDMI connection only has 5 differ...


DVI in FPGA

Started by Mawafugo in comp.arch.fpga8 years ago 4 replies

In xapp460 the DVI/HDMI transmitter & receiver is implemented but the max throughput limit to somewhat 750 Mb/s, which can handle up to 1080i or...

In xapp460 the DVI/HDMI transmitter & receiver is implemented but the max throughput limit to somewhat 750 Mb/s, which can handle up to 1080i or 720p resolution. The 1080p, however needs twice of that The question is how can we crank up the throughput to about 1.5 Gb/s ?


Opinions on Lattice ECP3

Started by David Brown in comp.arch.fpga7 years ago 16 replies

Hi, I haven't a lot of experience with FPGA design, but have done a few projects - mostly with Altera Cyclones, some with a Nios II. We are...

Hi, I haven't a lot of experience with FPGA design, but have done a few projects - mostly with Altera Cyclones, some with a Nios II. We are looking at making a new design that should be low cost, but needs a high speed serial interface (for reading in a DVI and/or HDMI signal). The obvious choice then is Lattice ECP3 (but I am very happy to hear alternative suggestions). I've a...


High-bandwidth Digital Content (HDCP) keys with FPGA?

Started by Morten Leikvoll in comp.arch.fpga6 years ago

Does anyone know how I could safekeep HDCP keys legally by implementing the HDCP (and HDMI/DisplayPort) engine in FPGA? (Yes, I know HDCP is...

Does anyone know how I could safekeep HDCP keys legally by implementing the HDCP (and HDMI/DisplayPort) engine in FPGA? (Yes, I know HDCP is cracked and that I can generate keys using the leaked master keys, but I want a legal solution)


advice needed for FPGA chip selection

Started by Manusha in comp.arch.fpga6 years ago 7 replies

Hello, I am working on a project which involve interfacing with Ethernet, USB, SATA and couple of other chips (mostly high performance...

Hello, I am working on a project which involve interfacing with Ethernet, USB, SATA and couple of other chips (mostly high performance audio/ video decoders and HDMI transmitters). In addition, the system needs enough computing resources for audio/video processing. (either through dedicated H/W realized in the FPGA or through software). My plan is to have a resourceful FPGA and have a soft...


Verilog module in VHDL project - ISE 13

Started by Mike Harrison in comp.arch.fpga6 years ago 1 reply

I want to use the Xilinx Spartan-6 XAPP495 HDMI/DVI transmit/receive modules, which are written in Verilog, in a new VHDL project, as I'm much...

I want to use the Xilinx Spartan-6 XAPP495 HDMI/DVI transmit/receive modules, which are written in Verilog, in a new VHDL project, as I'm much more familiar with VHDL - I don't do enough FPGA stuff to justify the time to learn a new language for one project. Can anyone point me towards how I can include the verilog modules and make the signals visible to my VHDL - any example of a verilog ...


TMDS CML PCB

Started by inv___ in comp.arch.fpga5 years ago 2 replies

Hello, I have problem with understanding differential nature of DC coupled CML pair in TDMS (DVI, HDMI). In DC coupled LVDS current flows...

Hello, I have problem with understanding differential nature of DC coupled CML pair in TDMS (DVI, HDMI). In DC coupled LVDS current flows from source through one wire of transmission line then through termination resistor and goes back through second line to source. So currents are equal and they flow in opposite direction. Loop is formed by source, differential pair and termination resisto...