NIOS-II+LAN91C111

Started by bjzh...@gmail.com in comp.arch.fpga13 years ago 2 replies

Hi,everyone,I am now doing a work about ALTERA nios-II.The FPGA I use is cycII-60,and the cpu is NIOS-II f,sdram ,lan91c11,dma controller and so...

Hi,everyone,I am now doing a work about ALTERA nios-II.The FPGA I use is cycII-60,and the cpu is NIOS-II f,sdram ,lan91c11,dma controller and so on,the main work I should do is to conmunicate the PCs and nios- II with lan91c111,I chose UDP to send and receive data,also It can work properly if I do'nt use dma to send and receive data,but the speed is low about 18Mbps,cpu freq is 50MHZ,so I wan...


NIOS-II+LAN91C111

Started by bjzh...@gmail.com in comp.arch.fpga13 years ago

Hi,everyone,I am now doing a work about ALTERA nios-II.The FPGA I use is cycII-60,and the cpu is NIOS-II f,sdram ,lan91c11,dma controller and so...

Hi,everyone,I am now doing a work about ALTERA nios-II.The FPGA I use is cycII-60,and the cpu is NIOS-II f,sdram ,lan91c11,dma controller and so on,the main work I should do is to conmunicate the PCs and nios- II with lan91c111,I chose UDP to send and receive data,also It can work properly if I do'nt use dma to send and receive data,but the speed is low about 18Mbps,cpu freq is 50MHZ,so I wan...


Primitive debuggable UART interface to a Nios within a multi-Nios system

Started by Ang Zhi Ping in comp.arch.fpga7 years ago 19 replies

I am working on an IP core with a Nios controller. This IP will eventually be integrated into a multi-Nios system. I also foresee that this IP...

I am working on an IP core with a Nios controller. This IP will eventually be integrated into a multi-Nios system. I also foresee that this IP will not be JTAG debuggable because the integrator will be using the JTAG facility on a higher level Nios controller. In this case I have planned to include a UART interface, which allows the integrator to do on-the-fly primitive debugging with t...


Nios memory

Started by cruzin in comp.arch.fpga17 years ago

I have an SRAM controller Avalon slave we created which Nios can successfully access to read and write SRAM. My question is: I can not set the...

I have an SRAM controller Avalon slave we created which Nios can successfully access to read and write SRAM. My question is: I can not set the program or data memory address in the Nios setup screen to this memory. Why not? Also: How does Nios determine where a malloc() will allocate memory from? Let's say I have GERMS on-chip in M4Ks, I have an on-chip MegaRAM slave, and an SRAM control...


What does nios-run do?

Started by cruzin in comp.arch.fpga17 years ago 5 replies

Hello, I can download a program to memory using "nios-run my_prog.srec" and it works fine. However, when I write the program into the same...

Hello, I can download a program to memory using "nios-run my_prog.srec" and it works fine. However, when I write the program into the same memory manually (ie. memory fill command), nios will not wrong the program properly. I verified that both methods write exactly the same program bytes into memory, but nios-run does something with the memory AFTER the program end. This must be the ...


re-assemble bootloader for NIOS Processor

Started by Dolphin in comp.arch.fpga14 years ago 2 replies

Hello, I want to recompile the bootloader for the Nios processor. The reason that I want to do this is: - I use an EPCS flash - by default...

Hello, I want to recompile the bootloader for the Nios processor. The reason that I want to do this is: - I use an EPCS flash - by default Nios code is situated directly after the FPGA bitstream - I want the Nios code to be in a different sector as the FPGA bitstream I guess that I will have to change boot_loader_epcs_bits.S for that. My first problem is to assemble these files. Has an...


Matlab code in nios processor

Started by sriman in comp.arch.fpga13 years ago

hi. i have made a fuzzy system in matlab. i have converted that into a c code using the real time tool box of matlab. i want to import this...

hi. i have made a fuzzy system in matlab. i have converted that into a c code using the real time tool box of matlab. i want to import this code and run a NIOS processor, can i do it. i tried to create a blank project in NIOS IDE and then add the files to the directory and change the make file. but i faced error. can any one tell me the procedure to import a C code to the nios processor


Nios Stratix

Started by Benoit in comp.arch.fpga16 years ago

Hi, I'm trying to use a NIOS Kit Eval Board (Stratix10). I would like to do a small application : => incr a counter value in FPGA (VHDH...

Hi, I'm trying to use a NIOS Kit Eval Board (Stratix10). I would like to do a small application : => incr a counter value in FPGA (VHDH code) => convert this value Hex to Dec in FPGA (C code) => use NIOS (UART) to display this Dec value in IHM (SOPC, Hyperterm, ...) I'm searching samples. Could you help me ?. Thanks in advance. Benoit.


Downloading program to Nios

Started by John in comp.arch.fpga17 years ago 4 replies

Dear all, I am trying to download hello_nios.srec to nios, using the sdk by typing the following command: nr hello_nios.srec I am...

Dear all, I am trying to download hello_nios.srec to nios, using the sdk by typing the following command: nr hello_nios.srec I am following the software tutorials provided by altera. for some reason, it is not working, it gives: [SOPC Builder]$ nr hello_nios.srec nios-run: Ready to download hello_nios.srec nios-run: Downloading...................... .............................


Emacs as GUI for NIOS-II

Started by Anonymous in comp.arch.fpga13 years ago

Which makefile should I use and where should the current working directory be located if I want to run a NIOS-II software build from the...

Which makefile should I use and where should the current working directory be located if I want to run a NIOS-II software build from the command line or emacs (linux or cygwin) rather than using Eclipse? Have anybodu used Emacs/GUD to interface to the NIOS-II gdb debugger? Thanks Petter -- A: Because it messes up the order in which people normally read text. Q: Why is top-posting su...


can't trap custom ITon NIOS

Started by Julien Chevalier in comp.arch.fpga17 years ago 2 replies

Hello, I use quartus II 4.00 and SOPC builder 4.00 to build a NIOS system on a Stratix II board. I enabled the support for external...

Hello, I use quartus II 4.00 and SOPC builder 4.00 to build a NIOS system on a Stratix II board. I enabled the support for external interruptions, add a user defined IP connected via the provided avalon ahb bridge. Everything is ok. Then I try to use the interruption of the bridge, everything on the wire is ok until the data_master_irq gets high. The iq number is ok, NIOS makes a cou...


Copyrights and licenses for NIOS design

Started by David Brown in comp.arch.fpga17 years ago

I'm working on a design using an Altera Cyclone and a NIOS processor. I'm having a little trouble working out exactly where things stand...

I'm working on a design using an Altera Cyclone and a NIOS processor. I'm having a little trouble working out exactly where things stand for copyrights and licenses for the code, especially the NIOS software. As I understand it, the intention of the Altera licensing is that I can use the design and my code, along with the NIOS libraries, on any system I want as long as the programable logi...


Reinstalled Quartus + Nios II => cygwin1.dll hell :-(

Started by Tommy Thorn in comp.arch.fpga15 years ago 1 reply

I used to use Cygwin, but when I installed Quartus II and Nios, my local installation stopped working; it couldn't find cygwin1.dll. Rather...

I used to use Cygwin, but when I installed Quartus II and Nios, my local installation stopped working; it couldn't find cygwin1.dll. Rather than fight that, I remove my local installation of it, uninstalled Quartus II and Nios II and reinstalled everything. To no avail the binaries under C:\altera\kits\nios2_60\bin\nios2-gnutools\H-i686-pc-cygwin\bin doesn't run. Incidently, the Nios ...


Nios II and eCos

Started by David Brown in comp.arch.fpga17 years ago 2 replies

Does anyone know if there are concrete plans for a Nios II port of eCos? There are several other OS'es ported to the Nios II already, such...

Does anyone know if there are concrete plans for a Nios II port of eCos? There are several other OS'es ported to the Nios II already, such as uC/OS-II and ucLinux, but I've heard nothing regarding eCos other than four-year-old promises that Altera and Red Hat were working on it. -- David "I love deadlines. I love the whooshing noise they make as they go past." Douglas Adams


[Nios II] How Can I define the pio inputs as a interrupt?

Started by Anonymous in comp.arch.fpga14 years ago 2 replies

I use the Nios II system to achieve my design. I have define a data bus from the outside of the FPGA, I use a 8-bits PIO ip to connect...

I use the Nios II system to achieve my design. I have define a data bus from the outside of the FPGA, I use a 8-bits PIO ip to connect the signal and the FPGA. I want to achieve the following aim: when the outside signals changes, Nios generates a IRQ to CPU, and I can insert my instructions. Please tell me , how can I do it ?


nios-build debug option

Started by Maxlim in comp.arch.fpga17 years ago 1 reply

Can anybody tell me what is the effect of debug option in nios-build command to the original program? What's the usage of debug script...

Can anybody tell me what is the effect of debug option in nios-build command to the original program? What's the usage of debug script that generated in the command? I'd connected my processor as a user defined peripheral to nios system module through SOPC Builder. The system performs corectly only when I use debug option during nios-build- to compile the C/C++ source code. Without the deb...


Nios II, ThreadX, NetX

Started by PaulK in comp.arch.fpga14 years ago 1 reply

Hi, I'm looking for a very compact TCP/IP stack for the Nios II, and the ThreadX/NetX combo seems to be, at least on paper, the smallest. ...

Hi, I'm looking for a very compact TCP/IP stack for the Nios II, and the ThreadX/NetX combo seems to be, at least on paper, the smallest. Anyone using this combo? How small are you able to build it, and with what services? How is their support? Any issues integrating it with the Nios IDE? Thanks, Paul


RESET pin on NIOS II processor

Started by Anonymous in comp.arch.fpga15 years ago 1 reply

Hi all, I have a problem driving the RESET pin on a NIOS II processor. I expect that when I pull LOW this pin, the NIOS II processor makes a...

Hi all, I have a problem driving the RESET pin on a NIOS II processor. I expect that when I pull LOW this pin, the NIOS II processor makes a reset. But this is not true, instead it reaches an unstable condition. Obviously, I make something of wrong, but where ? Do you have experienced my same situation ? Best Regards /Alessandro


Nios Development Kit, STRATIX Edition

Started by Gabru in comp.arch.fpga17 years ago 1 reply

Hey Guys, I have this "development Suite" and am wondering if it is worth anything, I'd like to sell it. If it isn't I'd like to know...

Hey Guys, I have this "development Suite" and am wondering if it is worth anything, I'd like to sell it. If it isn't I'd like to know which deserving group I should donate it to. Thanks for any comments. * Nios Embedded Processor, Documentation and Reference Designs * Nios development Board - Stratix EP1S10 Device - One 10/100 Ethernet and One CompactFlash Connector - Two RS-232 P...


regarding DMA memory to memory copy in NIOS II

Started by Anonymous in comp.arch.fpga13 years ago 4 replies

here is my codes. I want to verify the result and display at the end, however I got like "cdcd", what's wrong? thanks /* * "Hello World"...

here is my codes. I want to verify the result and display at the end, however I got like "cdcd", what's wrong? thanks /* * "Hello World" example. * * This example prints 'Hello from Nios II' to the STDOUT stream. It runs on * the Nios II 'standard', 'full_featured', 'fast', and 'low_cost' example * designs. It runs with or without the MicroC/OS-II RTOS and requires a STDOUT * ...