nios-run: waiting for target.......?

Started by longyin in comp.arch.fpga17 years ago 1 reply

Hello,everyone!I made a design following the tutorial in the nios develop kit and do the pin assignment as the example the factotry supplys.Then...

Hello,everyone!I made a design following the tutorial in the nios develop kit and do the pin assignment as the example the factotry supplys.Then I downloaded to apex board using quartusII .But I cannot download my execute code to the FPGA .The sdk shell annouce that waiting for the target.........why?Thanks.


clock problem --I new to this field so if question is silly don't mind

Started by badari in comp.arch.fpga15 years ago

hi all! I'm using NiosII with StratixII. i wanted to get interrupts from a micro controller of 7.393MHz Oscillator which generates half...

hi all! I'm using NiosII with StratixII. i wanted to get interrupts from a micro controller of 7.393MHz Oscillator which generates half the oscillator clock. Nios works at 50Mhz. so what modification i need to do on nios


how to debug a C/C++ application in NIOS II IDE

Started by sankalp.singhal in comp.arch.fpga16 years ago

hi all, how to debug a C/C++ application in NIOS II IDE?? what r the instructins/funtions used for programming a LED using HAL library...

hi all, how to debug a C/C++ application in NIOS II IDE?? what r the instructins/funtions used for programming a LED using HAL library ? regards sankalp.singhal


NIOS is stuck at alt_tick after reset

Started by Guy_FPGA in comp.arch.fpga12 years ago 3 replies

Hello all, I am working with Alter NIOS terasic DE3 board- I've written a software for NIOS. When I run it in debug mode it look fine....

Hello all, I am working with Alter NIOS terasic DE3 board- I've written a software for NIOS. When I run it in debug mode it look fine. When I press the on-board reset I can see in the IDE that it has entered reset mode. when I press the resume button - the SW is stuck. If I press the pause I see that the SW is stuck in a loop insited alt_tick.c --> void alt_tick(void)... Does anyone


Altera NIOS PIO interrupt problem

Started by Monica in comp.arch.fpga16 years ago 1 reply

Hello all, I am monica from germany.I am using NIOS in cyclone FPGA.I have problem with PIO interrupts. Environment details Quartus...

Hello all, I am monica from germany.I am using NIOS in cyclone FPGA.I have problem with PIO interrupts. Environment details Quartus Software : version 4.2 build 178 01/19/2005 SJ full version Nios software : version 1.1.0 build 137 FPGA : Altera cyclone I have a input signal which should generate interrupt on every rising edge.So I have used a PIO to capture the signal...


[Nios II] How fast the cpu in Nios II can reach in the Cycone ?

Started by lexluthor in comp.arch.fpga14 years ago 3 replies

Can it reach 100 DMIPS =A3=BF I give the cpu 100MHz clk, and use the Fast Core. There is a program: void main() { while(1) ...

Can it reach 100 DMIPS =A3=BF I give the cpu 100MHz clk, and use the Fast Core. There is a program: void main() { while(1) { IOWR_ALTERA_AVALON_PIO_DATA(PIO_0_BASE, data++); } } The frequence of change of the outputs can reach 100 MHz?


NIOS and OCI

Started by Jerry in comp.arch.fpga18 years ago 5 replies

This is from memory since work doesn't have access to newsgroups so here goes. We have a Stratrix development board with the NIOS software...

This is from memory since work doesn't have access to newsgroups so here goes. We have a Stratrix development board with the NIOS software package. Along with that is FS2 debugger. I have worked through the enclosed tutorials both the HW and SW. All was well and the debugger worked fine. I then wanted to add my own hardware into the PGA. I created a new project popped open Quartus 3.0 an...


Nios II debugging with gdb

Started by David Brown in comp.arch.fpga17 years ago 6 replies

I'm working with a Nios II processor on an Altera fpga. Mostly, I'm doing fine, but there is one feature of the Eclipse interface to gdb that I...

I'm working with a Nios II processor on an Altera fpga. Mostly, I'm doing fine, but there is one feature of the Eclipse interface to gdb that I seem to be missing - a gdb command window. There is a "nios2-gdb-server output" option for the Console window, but that's for output only. I want to be able to type my own commands. When using other gui front-ends for gdb, including gvd, insight a...


Nios IRQ lockup

Started by Matt Grandison in comp.arch.fpga17 years ago

I'm having trouble with a Nios processor that stops responding after an unpredictable time. It appears to be the result of liberally...

I'm having trouble with a Nios processor that stops responding after an unpredictable time. It appears to be the result of liberally using interrupt enable/disable statements. These statements are in place to protect shared variables. However, I have some concerns: 1. The register window (CWP) manager can generate an exception that won't be serviced if interrupts are disabled. It seems ...


Nios speed down

Started by Anonymous in comp.arch.fpga16 years ago 2 replies

I've just moved from Quartus 4.0 to 5.0, re-generated a Nios design under SoPC Builder, and run the design through Quartus. The timing has...

I've just moved from Quartus 4.0 to 5.0, re-generated a Nios design under SoPC Builder, and run the design through Quartus. The timing has gone from almost 90Mhz before to 72Mhz now. Anyone experienced similar speed-downs? Alan


Nios Memory Protection Unit

Started by julio in comp.arch.fpga11 years ago 1 reply

Hi, is anyone out there using the Memory Protection Unit option in the Nios II processor from Altera? I am trying to use it in a simple system...

Hi, is anyone out there using the Memory Protection Unit option in the Nios II processor from Altera? I am trying to use it in a simple system with no OS and would like to know if it has been used before by someone else to help to asses if the problems I am having are on my own code or if I can blame the MPU implementation. Regards, julio


Read from CF - Stratix II

Started by Guy_FPGA in comp.arch.fpga12 years ago

Hello there, I own the NIOS - stratix II development board ( http://www.altera.com/products/devkits/altera/kit-niosii-2S60.html ). Does...

Hello there, I own the NIOS - stratix II development board ( http://www.altera.com/products/devkits/altera/kit-niosii-2S60.html ). Does anybody know how to read a file from the onboard CF? I do not want to use an OS on the NIOS processor. Any reference design is more then welcome . . . Thanks, Guy


Nios II, ThreadX, NetX Anyone?

Started by PaulK in comp.arch.fpga14 years ago 2 replies

Hi, I'm looking for a very compact TCP/IP stack for the Nios II, and the ThreadX/NetX combo seems to be, at least on paper, the smallest. ...

Hi, I'm looking for a very compact TCP/IP stack for the Nios II, and the ThreadX/NetX combo seems to be, at least on paper, the smallest. Anyone using this combo? How small are you able to build it, and with what services? How well does it work? How is their support? Thanks, Paul


system simulation and verification methods (NIOS)

Started by J-Wing in comp.arch.fpga18 years ago 1 reply

what ways and approaches are there to do system level simulation? i have a nios system module and a user logic which have been...

what ways and approaches are there to do system level simulation? i have a nios system module and a user logic which have been connected together via the avalon bus. can simulation be done using quartus II?


NIOS Small C library

Started by Pratip Mukherjee in comp.arch.fpga16 years ago 1 reply

Can anybody please tell me where can I find the documentation on the list of functions included in the Small version of NIOS C library (newlib)?...

Can anybody please tell me where can I find the documentation on the list of functions included in the Small version of NIOS C library (newlib)? Altera's documentation really not helping me. Thanks.


Altera Instructor-led course on Designing with NIOS II

Started by Anonymous in comp.arch.fpga17 years ago

Anybody here attended Altera course titled "Designing with NIOS II and SOPC Builder"? It is instructor-led, 8 hours course, $195 per student. Is...

Anybody here attended Altera course titled "Designing with NIOS II and SOPC Builder"? It is instructor-led, 8 hours course, $195 per student. Is it worth going?


NIOS II CFI interface

Started by bjzh...@gmail.com in comp.arch.fpga13 years ago 3 replies

Hi,everybody,I am a fresher of NIOSII,and in the passed days ,I have been familar with the nios II system,also write some test program about the...

Hi,everybody,I am a fresher of NIOSII,and in the passed days ,I have been familar with the nios II system,also write some test program about the gpio,timer,uart and can work properly,today I add the flash controoler(CFI),but it doesn't work.And I use the signal tap to watch the wave and the address bus is active but the read,write and cs is always '1',I don't know why,can someone give me some...


UART CORE FOR NIOS

Started by Anonymous in comp.arch.fpga16 years ago 3 replies

We are working on a proect using NIOS which needs to talk to the PC Via a serial port, However we found that the core supplied by AILTERA...

We are working on a proect using NIOS which needs to talk to the PC Via a serial port, However we found that the core supplied by AILTERA seems to work at slow speed only even the core is runing at 50mhz, it seems that it cannot run faster than 2400baud, Any body has silmiar problems? We are trying a UART with FIFO but still struggling with it. Any ideas/ suggestion?


Custom Nios Results...

Started by Kenneth Land in comp.arch.fpga17 years ago

In case anyone is interested I posted some results of a new commercial Cyclone/Nios board on...

In case anyone is interested I posted some results of a new commercial Cyclone/Nios board on altera.openchip.org. http://altera.openchip.org/forum/viewtopic.php?t=4 Basically shows a table of different configurations showing maximum stable clock rates. Ken


mouse to Nios Development kit

Started by clsan in comp.arch.fpga18 years ago 8 replies

Hi all, I am doing a project and using Altera Nios Development kit with Stratix Edition. I need to connect a serial/PS/2 mouse to that...

Hi all, I am doing a project and using Altera Nios Development kit with Stratix Edition. I need to connect a serial/PS/2 mouse to that board . But the board can't get any signal from the mouse, anyone has this experience can share with me?I have already set the UART 2 to 1200 baud rate. Thank you very much. San