Question about Virtex II Pro - Partial Reconfiguration

Started by Alvaro in comp.arch.fpga16 years ago

Hi, I'm working with a Virtex II Pro, and I want know where can I find the number of slices that change in partial bitstream. Thank you.

Hi, I'm working with a Virtex II Pro, and I want know where can I find the number of slices that change in partial bitstream. Thank you.


Virtex-II Pro ML-300 Evaluation Platform

Started by Rudy Hartmann in comp.arch.fpga18 years ago

This is a multi-part message in MIME format. ------=_NextPart_000_0D63_01C39336.5E80EB10 Content-Type:...

This is a multi-part message in MIME format. ------=_NextPart_000_0D63_01C39336.5E80EB10 Content-Type: text/plain; charset="iso-8859-1" Content-Transfer-Encoding: quoted-printable Virtex-II pro ML-300 Evaluation Platform For Sale Cheap! I have one piece of a brand new Xilinx Virtex-II pro ML-300 Evaluation Platform for sale. It is brand new and in the original factory box. Everythi...


Virtex-4 development boards

Started by David R Brooks in comp.arch.fpga17 years ago 1 reply

Does anyone know of a planned/released Development Board for the larger Virtex-4 parts (preferably XC4VLX100)? Google doesn't find...

Does anyone know of a planned/released Development Board for the larger Virtex-4 parts (preferably XC4VLX100)? Google doesn't find anything. TIA


Help needed getting started with virtex II pro

Started by akshay jain in comp.arch.fpga16 years ago 1 reply

hi I need to start working on a xilinx virtex II pro board in a few days. I am new to fpgas. Could someone please suggest some manuals...

hi I need to start working on a xilinx virtex II pro board in a few days. I am new to fpgas. Could someone please suggest some manuals and links to get started. Regards Akshay


Virtex II Pro

Started by maxascent in comp.arch.fpga15 years ago 1 reply

I would like to obtain a Virtex II Pro 20K part in FG676 package for prototyping. I am in the UK and have seen the part on Digikey for...

I would like to obtain a Virtex II Pro 20K part in FG676 package for prototyping. I am in the UK and have seen the part on Digikey for around $320. Does seem like a good price or does anyone know of a cheaper alternative. Or would it be possible to get a one off sample? Cheers Jon


Virtex 4 Unbonded IOB

Started by al99999 in comp.arch.fpga15 years ago

Hi, I'm trying to use the unbonded IOB's available in the virtex 4 (lx25) as route through's to allow one input to fanout to say 16...

Hi, I'm trying to use the unbonded IOB's available in the virtex 4 (lx25) as route through's to allow one input to fanout to say 16 IDELAY's. Any ideas of how to go about doing this or documents that explain this would be much appreciated. Thanks in advance, Alastair


MPMC2 for Virtex-5 when?

Started by Antti in comp.arch.fpga14 years ago

hi any release date for new version of MPMC2 and/or udpate for Virtex-5 support? I would like to test drive it on ML505 but there seems to be...

hi any release date for new version of MPMC2 and/or udpate for Virtex-5 support? I would like to test drive it on ML505 but there seems to be no update available since october:( Antti


How to use the 8LEDs on DIO4 when connected to Virtex 2 Pro kit?

Started by Krishna in comp.arch.fpga14 years ago 1 reply

Hello, I am trying to implement an 8 bit adder program using VHDL on Virtex 2 pro with expansion kit DIO4 from digilent. The code is...

Hello, I am trying to implement an 8 bit adder program using VHDL on Virtex 2 pro with expansion kit DIO4 from digilent. The code is correct and I can see the result on 4 LEDs of Virtex 2 pro kit from Digilent. But when trying with LEDs on DIO4 kit, I could not see any result. I gave the direct pin connections both for switches and LEDs. The switches are working fine but not the LEDs. In...


Can ISE 4.2 program Virtex 2 6000K devices?

Started by Frank in comp.arch.fpga15 years ago 2 replies

Just got the old PC from the storage of the lab which has ISE 4.2 installed. I only need the PC to program Virtex 6000 and xc18v04, do I need to...

Just got the old PC from the storage of the lab which has ISE 4.2 installed. I only need the PC to program Virtex 6000 and xc18v04, do I need to upgrade to ISE 6 or above? Thank you.


virtex 4

Started by Ernest Scheiber in comp.arch.fpga15 years ago 2 replies

Hi can anyone tell how much Virtex 4 costs, given that I only want to buy 2 chips :). e.

Hi can anyone tell how much Virtex 4 costs, given that I only want to buy 2 chips :). e.


5 input LUT in virtex

Started by Taufik Siswanto in comp.arch.fpga17 years ago

I wonder why FPGA Express can't directly infer 5 input LUT, a feature of virtex (even xc5200), even for obvious expression such as: y <= a and b and c and...

I wonder why FPGA Express can't directly infer 5 input LUT, a feature of virtex (even xc5200), even for obvious expression such as: y <= a and b and c and d and e; Would anyone tell the workaround, if any, to this problem. Thank you. Regards, Taufik Siswanto


MontaVista Linux and Virtex-II & 4

Started by Osnet in comp.arch.fpga15 years ago 6 replies

Does anyone know if MontaVista Linux or other distributions support SMP in Virtex-II Pro and Virtex-4? Thanks.

Does anyone know if MontaVista Linux or other distributions support SMP in Virtex-II Pro and Virtex-4? Thanks.


Virtex: Foundation 3.1 Error

Started by Nyoman Yani H in comp.arch.fpga18 years ago

Dear all  I am using Xilinx Foundation 3.1i to implement my design into XSV board and debug using hardware  debugger.  I am...

Dear all  I am using Xilinx Foundation 3.1i to implement my design into XSV board and debug using hardware  debugger.  I am trying to instantiate readback symbol in my design using this file : library IEEE;  use IEEE.std_logic_1164.all;  library virtex;  use virtex.components.all; entity rdbk is  port


Virtex-4FX and ethernet mac

Started by Marco T. in comp.arch.fpga15 years ago 5 replies

Hallo, I'm planning to buy a development board based on Virtex-4FX. I have read about V-4FX that ethernet mac is inside the FPGA. I should...

Hallo, I'm planning to buy a development board based on Virtex-4FX. I have read about V-4FX that ethernet mac is inside the FPGA. I should buy also the license to use it when I make a project into EDK for plb interface? Many Thanks Marco


Linux on Virtex 4?

Started by Bill in comp.arch.fpga14 years ago 3 replies

Does anyone have experience or know the best solution to get Linux on Virtex 4? I heard something about MicroBlaze as a softcore processor.

Does anyone have experience or know the best solution to get Linux on Virtex 4? I heard something about MicroBlaze as a softcore processor.


Virtex 5 HDMI

Started by maxascent in comp.arch.fpga12 years ago 6 replies

I would like to implement a HDMI transmitter with a Virtex 5. Does anyone know if there is a chip that converts LVDS to TMDS? Thanks Jon

I would like to implement a HDMI transmitter with a Virtex 5. Does anyone know if there is a chip that converts LVDS to TMDS? Thanks Jon


Virtex 2 Pro : Rocket IO Simulation Problem

Started by Adarsh Kumar Jain in comp.arch.fpga17 years ago

Hi, I am using a Virtex 2 Pro (V2P7) device to perform some deserialization and 8b/10b decoding. I use ISE 6.1SP3 and Active HDL 6.1 SP2. Its...

Hi, I am using a Virtex 2 Pro (V2P7) device to perform some deserialization and 8b/10b decoding. I use ISE 6.1SP3 and Active HDL 6.1 SP2. Its a very simple design and right now all I am trying to do is to get something out of the tranceiver. The code is given below : The DCM parts simulate ok but I am not sure about how to drive the RXP and RXN inputs to the Transceiver. I try to feed ...


Successful use of MGT on Virtex 4

Started by JarJarJP12 in comp.arch.fpga15 years ago 5 replies

Has anyone been able to successfully simulate a test of the MGT on the Virtex-4? I've been trying to instantiate the GT11_custom for a...

Has anyone been able to successfully simulate a test of the MGT on the Virtex-4? I've been trying to instantiate the GT11_custom for a while, and it just does not seem to work. Basically I've instantiated two MGT's and have tied them together via the RXN/P - TXN/P. I've tried to use 8B/10B encoding and that didn't seem to work. This lead me to strip the MGT completely and use it only as a...


Virtex 5 slave serial config

Started by dajjou in comp.arch.fpga12 years ago 9 replies

Hi everybody, When configuring my Virtex 5 with encrypted bitstream (CCLK rate is 100 MHz) the FPGA doesn't start up ! whereas it is not the...

Hi everybody, When configuring my Virtex 5 with encrypted bitstream (CCLK rate is 100 MHz) the FPGA doesn't start up ! whereas it is not the case for unencrypted one . Why ??? I need to configure the FPGA as quickly as possible. Thanks.


If you need higher fmax for your FPGA design

Started by Maximum Frequency in comp.arch.fpga17 years ago

If you are designing an FPGA based on Xlinx's Virtex, Virtex 2, Virtex 2 pro, Spartan 2, or Spartan 3 and would like to get higher fmax for your...

If you are designing an FPGA based on Xlinx's Virtex, Virtex 2, Virtex 2 pro, Spartan 2, or Spartan 3 and would like to get higher fmax for your design I may be able to help you. Higher fmax would enable you to use part with lower speed grade which potentially could save some money for you. The files that I need are mapped ncd file and pcf file. I will do par automatically and manually such t...