Memory Initialization: mif, coe, hex, etc,

Started by Josh Pfrimmer in comp.arch.fpga14 years ago 8 replies

Hi experts, I've looked through the archives, and the Xilinx literature, and haven't found an answer to this question, so please forgive me if...

Hi experts, I've looked through the archives, and the Xilinx literature, and haven't found an answer to this question, so please forgive me if it's obvious and/or everyone's sick of answering. I've spent a couple of days on this. I'm upgrading a lab here at UVic from an xc4000 based board to a Spartan2. So as not to complicate the upgrade needlessly, we'd like to stick with Foundation 4...


QUES: Where can I find Xilinx M1 tools

Started by Ted in comp.arch.fpga14 years ago 6 replies

I have to make a change to a XC4005pc84-5 part but I don't have the tools that support XC4000 parts. I've gone all the way back to Alliance...

I have to make a change to a XC4005pc84-5 part but I don't have the tools that support XC4000 parts. I've gone all the way back to Alliance Series 1.5i and XC4000E's are supported but not XC4000's. I believe I need an old set of M1 tools but I don't know where to find them. Does anyone know where I can get an old set of Xilinx tools that can supports XC4000 parts (not XC4000E parts). Th...


QUES: ODFX/IDFX inferred in syplify, and not in XACT libraries ????

Started by Ted in comp.arch.fpga14 years ago 1 reply

I have to make changes to an old legacy product containing an XC4005 part. I was able to find a set of old XACT tools but the problem is that...

I have to make changes to an old legacy product containing an XC4005 part. I was able to find a set of old XACT tools but the problem is that the newer synplify versions infer the primitives IDFX and ODFX. These to primitives are NOT included in the XC4000 libriaries and I have not been been able to get past the xnfmerge step. I looked at the xnf file and the ODFX and IDFX primitives a...


Software for synthesis

Started by Anonymous in comp.arch.fpga14 years ago

Hi every body, I tried to make a P&R with ISE 5.2 and i saw that there is no XC4000 target possible. Is there a library i have to...

Hi every body, I tried to make a P&R with ISE 5.2 and i saw that there is no XC4000 target possible. Is there a library i have to download or do i have to look for an old version of Xilinx tools. If so what is the last version and tool that will be capable of making P&R for and XC4003A and an XC3020A Thanks


X-checker Pod : Problem w/ X-checker and Win2000

Started by Vadim Vaynerman in comp.arch.fpga13 years ago 3 replies

Hi all, I have a legacy design for an XC4000 that I'm trying to program through the X-checker pod, and this has not worked under Windows 2000...

Hi all, I have a legacy design for an XC4000 that I'm trying to program through the X-checker pod, and this has not worked under Windows 2000 or XP. Windows 98 works fine. What can I do to get this to work under the new OS? Thanks, Vadim


XC4005-6PQ160C datasheet

Started by SimonX in comp.arch.fpga13 years ago 1 reply

Has anybody datasheet of XC4005-6PQ160C or XC4000 seria? Thanks for link or sending ... Simon (c-aza@c-mail.cz)

Has anybody datasheet of XC4005-6PQ160C or XC4000 seria? Thanks for link or sending ... Simon (c-aza@c-mail.cz)


Xilinx eagle package (PQ208)

Started by Simon in comp.arch.fpga13 years ago 3 replies

Hi all, Is there a Xilinx PQ208 package available anywhere for Eagle (I have a registered 4.09r2) that works with the autorouter...

Hi all, Is there a Xilinx PQ208 package available anywhere for Eagle (I have a registered 4.09r2) that works with the autorouter ? Whenever I place even any of the library components in the cadsoft-supplied xilinx.lbr, I get an unroutable component (try 2 of the XC4000-type components, and click autoroute). I tried setting the routing grid low (1 mil) and the ripup options high (10x ...


Xilinx XC4000 series

Started by Paul in comp.arch.fpga11 years ago 1 reply

I have just been ask to upgrade an old product which uses a XC4010 and a 4005. I know that these parts are not supported by Xilinx any more...

I have just been ask to upgrade an old product which uses a XC4010 and a 4005. I know that these parts are not supported by Xilinx any more so my Q is does any one know if an other fpga That will fit in same footprint?? The 4005 is a 100p and the 4010 is a 16pin I was unable to find any thing or is there another solution?? This design was done with FPGA Express VHDL (at least thats what th...


Can Map and Par still handle the XC4000e family?

Started by B. Joshua Rosen in comp.arch.fpga13 years ago 1 reply

I just had a query from a potential client who has a large number of very old systems that they need to support. The systems use the XC4013e...

I just had a query from a potential client who has a large number of very old systems that they need to support. The systems use the XC4013e and XC4010e. Assuming that there is a synthesis tool that still supports the XC4000E family (I'm pretty sure that Synplify can still do it), will the current versions of map and par be able to place and route a 4000E design?


which version PCI LogiCore for XC4000E?

Started by SimonX in comp.arch.fpga13 years ago 1 reply

Which version of Xilinx Foundation has contained PCI LogiCore for XC4000E (= version 1.2)? I have installed Foundation 4.1i, but there is PCI...

Which version of Xilinx Foundation has contained PCI LogiCore for XC4000E (= version 1.2)? I have installed Foundation 4.1i, but there is PCI 32b/33MHz support for Virtex only. Thank You very very much for answere.


which version PCI LogiCore for XC4000E?

Started by SimonX in comp.arch.fpga13 years ago 1 reply

Thank you, Eric, for quick answer. I have bought some pcs of XC4013E-PQ240-3C on eBay :) for my unprofit use in my hobby only. But I don?t...

Thank you, Eric, for quick answer. I have bought some pcs of XC4013E-PQ240-3C on eBay :) for my unprofit use in my hobby only. But I don?t understand what is role of PCI LogiCore, when CoreGen of older Foundations isn?t usable (... if I understand correctly). To generate correct pci.vhd for appropriate core only? But why aren?t downloadable pci.vhd-s for this purpose directly (e.g. on xilinx?...


Any help about this demo board

Started by Anonymous in comp.arch.fpga14 years ago 1 reply

Hi all, I wonder if some one had already worked or bought this demo board Xilinx Demonstration Board with XC3020A and XC4003A...

Hi all, I wonder if some one had already worked or bought this demo board Xilinx Demonstration Board with XC3020A and XC4003A and XChecker cable. I want to use some sheap one to test some design at home, so what do you think about this board and is there any documentation, help or some project that targeted this feature in the net??? Thanks...


Need help with old Xilinx project

Started by Paul in comp.arch.fpga11 years ago

I am looking for someone who can help me with an old design. THis was done with a XC4005 and of course none of the new tools support this...

I am looking for someone who can help me with an old design. THis was done with a XC4005 and of course none of the new tools support this part. I have an old Foundation CD v2.1i and insalled it on an old win 98 machine but cannot get the synopsys license to work. So looking for help OR if someone out there still has a working software and can build me a prom file please contact me and we c...


Replacement for XC4005E

Started by Terry Brown in comp.arch.fpga5 years ago 12 replies

We've been using the venerable XC4005E FPGA from Xilinx for many years now in a bunch of products. However the variant we use has now been...

We've been using the venerable XC4005E FPGA from Xilinx for many years now in a bunch of products. However the variant we use has now been discontinued, and although we can get sufficient quantities to satisfy our quite low (


I2C protocol to communicate between FPGAs

Started by greenplanet in comp.arch.fpga13 years ago 15 replies

Dear all, I am a newbie and am currently having a project to develop an I2C protocol in VHDL. My aim is to communicate between two...

Dear all, I am a newbie and am currently having a project to develop an I2C protocol in VHDL. My aim is to communicate between two Xilinx XC4005XL, one as master and one as slave. I wonder if any of you could provide me with some ideas on how I should start. I2C has 2 wires, SCL and SDA; all I have to do is to play with these two wires? What else should be considered? What I should do...