Hi,
  -> how to get the data from the ADC <- 
  This depends on what type of adc(serial, parallel, ....) are you
using. The best thing is go through
the datasheet of adc that you are going to use.

Regards
pablo


----------------
bhuvasen@hotmail.com (senthil) wrote in message news:<3045a319.0409070139.1fc9f3a4@posting.google.com>...
> hello friends,
> 
>  I am doing project in college. i want to know how to get the digital
> data from the ADC and store in the fpga Ram (say spartan II). pls give
> me some suggestions.
> actually, the design connected with the analog part. the analog part
> end will have ADC. how to get the data from the ADC..
> 
> regards
> 
> senthil.R

bhuvasen@hotmail.com (senthil) wrote in message news:<3045a319.0409070139.1fc9f3a4@posting.google.com>...
> hello friends,
> 
>  I am doing project in college. i want to know how to get the digital
> data from the ADC and store in the fpga Ram (say spartan II). pls give
> me some suggestions.
> actually, the design connected with the analog part. the analog part
> end will have ADC. how to get the data from the ADC..
> 
> regards
> 
> senthil.R

Hi,

Obviously no one is going to do your homework for you.

Anyway, this is a basic suggestion for proceeding :

- First select an ADC, either serial (often SPI) or parallel access,
depending on your requirements in terms of precision etc..
 
- Study the possible interfaces

-- Serial is less consuming in terms of pins, but more difficult to
develop in VHDL, since you will have to control serial clock, chip
select and serial data in/out ; and serialize/deserialize the data for
storage into the FPGA memory. You will find a lot of serial ADC's.
 
-- Parallel is easier to describe in VHDL, but needs more interface
lines

Once you made up your mind, carefully study the selected interface
(SPI for instance or parallel). Also study the interface to the
synchronous dual port rams. Then devise a state machine that shall do
the work . You of course need a clock to control your state machines.

I hope this can help a bit.

NOTE: an experienced VHDL programmer would require something like
between two hours and six hours to do the job, assuming a good
knowledge of the Spartan II, of the SPI bus and state machines. So, do
not expect to make your homework in just a few days, because you start
from scratch.

To get the data from the ADC, read the data sheet on the ADC available from
the manufacturer's website which includes the signal states and transitions
needed to get a value.  Connect these signals to the FPGA in a way that you
reproduce those signals.

To get the data into the BlockRAM, read the description of the BlockRAM's
operation and the signal states and transitions needed to write that data in
the Libraries Guide in the Xilinx Software manuals (
http://www.xilinx.com/support/software_manuals.htm ).  Apply those signals
in your FPGA.


"senthil" <bhuvasen@hotmail.com> wrote in message
news:3045a319.0409070139.1fc9f3a4@posting.google.com...
> hello friends,
>
>  I am doing project in college. i want to know how to get the digital
> data from the ADC and store in the fpga Ram (say spartan II). pls give
> me some suggestions.
> actually, the design connected with the analog part. the analog part
> end will have ADC. how to get the data from the ADC..
>
> regards
>
> senthil.R

hello friends,

 I am doing project in college. i want to know how to get the digital
data from the ADC and store in the fpga Ram (say spartan II). pls give
me some suggestions.
actually, the design connected with the analog part. the analog part
end will have ADC. how to get the data from the ADC..

regards

senthil.R