Reply by Rob Gaddi July 21, 20172017-07-21
On 07/13/2017 09:05 PM, Jon Elson wrote:
> Jon Elson wrote: > >> Hello, all, >> >> I have an old design implemented in the Xilinx 9572, and need to update >> it. Using ise 13.4, I created a new project, imported the files, and found >> it >> won't fit in the 9572XL, which was a big surprise. Although the 9572 was >> fairly full, the design easily fit there, and I just recompiled it for the >> 9572, and this version of ise easily fit it. >> > Ah, I found that the REAL place you set the options is right clicking the > fit button then properties. With a little adjustment of parameters, it did > fit, but seems to use a little more resources than on the 9500. But, I have > to add 2 signals to the state machine to control an external bi-directional > level translator, so with it so close to the limit, I think it will be > necessary to move up to the 95144XL part. > > Jon >
The one thing I'd mention is, have you tried comparing the portion-by-portion resource usage breakdowns between the 9572 and 9572XL builds? It may be there was one section of the design that the synthesizer got confused about in the XL and blew up. -- Rob Gaddi, Highland Technology -- www.highlandtechnology.com Email address domain is currently out of order. See above to fix.
Reply by Jon Elson July 14, 20172017-07-14
Jon Elson wrote:

> Hello, all, > > I have an old design implemented in the Xilinx 9572, and need to update > it. Using ise 13.4, I created a new project, imported the files, and found > it > won't fit in the 9572XL, which was a big surprise. Although the 9572 was > fairly full, the design easily fit there, and I just recompiled it for the > 9572, and this version of ise easily fit it. >
Ah, I found that the REAL place you set the options is right clicking the fit button then properties. With a little adjustment of parameters, it did fit, but seems to use a little more resources than on the 9500. But, I have to add 2 signals to the state machine to control an external bi-directional level translator, so with it so close to the limit, I think it will be necessary to move up to the 95144XL part. Jon
Reply by Jon Elson July 14, 20172017-07-14
Hello, all,

I have an old design implemented in the Xilinx 9572, and need to update it.  
Using ise 13.4, I created a new project, imported the files, and found it 
won't fit in the 9572XL, which was a big surprise.  Although the 9572 was 
fairly full, the design easily fit there, and I just recompiled it for the 
9572, and this version of ise easily fit it.

Does anybody have any suggestions on settings to make it fit in the XL?

The error messages suggest reducing the collapsing input limit or the 
product term limit.  I did this in the Design goals and Strategies, but at 
the end of the fitter report it still shows the default values.  Is there a 
trick to making it use the modified limits and other options?

Not only does the 95144XL cost a bit more, but it is only available in the 
next size up package.

Thanks very much for any help.

Jon