> I do not have FPGA experience, and I am not sure if my question make
sense.
>
> Assume that we have a set of C++ code of various set of signal
processing,
> filtering, decision making, neural network, fuzzy logic etc.
> Is it possible to convert (some how) these C++ code to run in FPGA ?
> Is there a tool to convert C++ to FPGA code?
Also post question to comp.dsp and see what they have to say, they may
be more inclined to SW on DSP though.
Give more details about required performance.
It all depends on your throughput, if its low enough you may well be
better off sticking with a PC host, PCs still run circles around DSPs
and simple low perf FPGA designs on raw clock freq but the OS will make
it hard for it to be in realtime if you have HW IO. If you have some
real world signal acquisition from say an A<>D card, then its just a
question of who's gonna do the math, as well as who's gonna do the
bandwidth shuffle. At some point PCI becomes useless, FPGAs can have
enormous bandwidth capabilities but in the end the data usually has to
pass to a PC for analysis, storage etc.
Also FP has a huge killer effect on FPGAs but is almost free on PCs.
I'd suspect you may have some FP in your C code too, if you have, thats
your 1st problem to sort out, integerize as much as possible, although
that can slow down code on a PC but orders faster/cheaper if you end up
in FPGA or DSP.
So many choices.
johnjakson at usa dot com
Reply by Kris Vorwerk●March 29, 20052005-03-29
> I do not have FPGA experience, and I am not sure if my question make sense.
>
> Assume that we have a set of C++ code of various set of signal processing,
> filtering, decision making, neural network, fuzzy logic etc.
> Is it possible to convert (some how) these C++ code to run in FPGA ?
> Is there a tool to convert C++ to FPGA code?
As others have mentioned, there *are* tools to convert C++ code to FPGA
code, but your mileage may vary, and some effort will likely be required
to make the generated VHDL/Verilog function properly.
If the C++ code has already been written, a simpler solution might be
for you to use a processor core (say, from http://opencores.org, or the
Nios, etc.) .... Though perhaps not as fast as a pure hardware
implementation, this might offer you a quicker/easier path to
completion.
Kris
Reply by JJ●March 28, 20052005-03-28
And before that HandelC but not sure about C++ aspect as I don't recall
any class support.
You have some learning curve in front of you which ever direction you
go in as you will be touching real HW. Unless you are in a .edu
environment you will be paying a pretty penny for any C/C++ to HW
generation.
You could just as easily take a look at any Verilog/VHDL text on DSP
design and see if it wouldn't make more sense to go direct to HW that
way. You only need to learn a very small subset of either language to
get the results you might want, more if you use the language fully for
verification, less if you use C. More if you want best performance
possible.
Upside is your tools will be almost free for X/A for either V/V
language (upto modest size designs that is) and your results will be
ultimately much better than any C/C++ path.
Downside is you may be looking at multiple language representations of
the same code. Thats not necessarily hard but it takes time to learn
how to think HW and code appropriately while also wearing your C SW
hat.
One aproach I use is to use a cycle C form that essentially looks like
Verilog line for line until you look close enough. Cycle C is obviously
free for me and runs on any C like env, but doesn't take much time
either to fix the syntax back into proper Verilog. It is limited in
many ways (flattish hierarchies) but works well for DSP/cpu projetcs
for me and test vectors used in the C model are easy to convert to
Verilog.
Another poster might suggest Confluence, or SystemC to look at too..
Once you choose the V/V HDL route you also get the benefit of a far
larger NG base to call upon, here, verilog/vhdl and of course dsp NGs
etc. And in particular a few experts around here and quite a bit of
free source code from opencores and also X/A websites. If you use a
proprietary C++HDL you are confined to a much smaller source of
examples, free goodies and advice!
If that tickles your fancy then Palnitkar, Doug Smith and a few others
are very good HDL authors.
regards
johnjakson at usa dot com
Reply by Wenrui Gong●March 28, 20052005-03-28
Catapult C by Mentor Graphics
Ustuiosima Huslova wrote:
> I do not have FPGA experience, and I am not sure if my question make sense.
>
> Assume that we have a set of C++ code of various set of signal processing,
> filtering, decision making, neural network, fuzzy logic etc.
> Is it possible to convert (some how) these C++ code to run in FPGA ?
> Is there a tool to convert C++ to FPGA code?
>
>
>
Reply by ●March 28, 20052005-03-28
I do not have FPGA experience, and I am not sure if my question make sense.
Assume that we have a set of C++ code of various set of signal processing,
filtering, decision making, neural network, fuzzy logic etc.
Is it possible to convert (some how) these C++ code to run in FPGA ?
Is there a tool to convert C++ to FPGA code?