The NIOS IDE produces a ext_flash.flash file and a .elf file. I'm
assuming that the .flash file contains the entire program data with a
Flash to SDRAM copier for booting.

I'm relying on the Altera tools such as the Flash file generator (which
seems to run as a part of the software compilation in NIOS IDE), and
the Altera supplied boot loader (which performs the copy from Flash to
SDRAM).

I'll poke around a bit more, but it gets extreme I wonder if I can
disassemble the .flash file to see if the boot loader is in fact there.

Correcting something in my previous post, the SDRAM does not connect to
the FPGA via the Avalon tri-state bus, but rather a dedicated bus to
the FPGA.

Cheers,
Joseph Tan

Joseph Tan wrote:
> Hi,
> 
> Has anyone got NIOS software to boot from Flash?
> 
> I'm working on a Stratix II-based design with onboard NIOS and
> peripherals (16MB flash, Ethernet, SDRAM etc). The Flash, Ethernet, and
> SDRAM components are wired to the Stratix-II via an Avalon tri-state
> bus, similar to the design on the Stratix Edition Nios development kit.
> A single Nios CPU core is running at 50MHz.on the Stratix II.
> 
> I plan to have both the FPGA firmware and NIOS software stored in Flash
> in our end application. So far the FPGA firmware appears to load fine,
> on boot up a CPLD configures the FPGA with data stored in Flash. I can
> then execute my NIOS application by loading in software using Quartus
> II.
> 
> To boot up my application software from Flash I had previously set the
> Nios's reset address to "ext_flash" with an appropriate address
> offset. I then write into Flash my software application's
> "ext_flash.flash" file which is generated after software compilation. I
> assert and keep the Nios in CPU reset, run Signal Tap, and deassert CPU
> reset.
> 
> What I see happening is that the CPU does appear to read the software
> application data from Flash at the correct address. The data looks
> correct too, at least to the extent of the small period of time covered
> by Signal Tap. My software application does not execute properly, as I
> see the Nios then reading from roughly 0x380000 to perhaps the end of
> the flash device and repeating continually. I have attempted to use
> elf2flash to manually create my own software flash file, specifying the
> flash boot loader from "
> ../componenta/altera_nios2/boot_loader_cfi.srec" but this produced the
> same result. Is this the correct boot loader?
> 
> In my software application's system library, I have set the Program
> memory (.text), Read-only data memory (.rodata), and Read/write data
> memory (.rwdata) to sdram. I intend for this code to actually execute
> in SDRAM after being copied from Flash by the bootloader.
> 
> I'd like to hear from anyone if there is a problem with this set up.

Never used the NIOS2 IDE though...just normal Linux/OSX environment for 
this (o;

So is the .data segment also in your flash and do you copy it to SDRAM
after reset? Do you also clear .bss section?

I normally generate code for run from SDRAM/SRAM for better performance
and relocate the whole code to RAM after reset. Setup initial SP and
just call main() in RAM (o;

You might want to look at u-boot source code how it is done there...


jedi

Hi,

Has anyone got NIOS software to boot from Flash?

I'm working on a Stratix II-based design with onboard NIOS and
peripherals (16MB flash, Ethernet, SDRAM etc). The Flash, Ethernet, and
SDRAM components are wired to the Stratix-II via an Avalon tri-state
bus, similar to the design on the Stratix Edition Nios development kit.
A single Nios CPU core is running at 50MHz.on the Stratix II.

I plan to have both the FPGA firmware and NIOS software stored in Flash
in our end application. So far the FPGA firmware appears to load fine,
on boot up a CPLD configures the FPGA with data stored in Flash. I can
then execute my NIOS application by loading in software using Quartus
II.

To boot up my application software from Flash I had previously set the
Nios's reset address to "ext_flash" with an appropriate address
offset. I then write into Flash my software application's
"ext_flash.flash" file which is generated after software compilation. I
assert and keep the Nios in CPU reset, run Signal Tap, and deassert CPU
reset.

What I see happening is that the CPU does appear to read the software
application data from Flash at the correct address. The data looks
correct too, at least to the extent of the small period of time covered
by Signal Tap. My software application does not execute properly, as I
see the Nios then reading from roughly 0x380000 to perhaps the end of
the flash device and repeating continually. I have attempted to use
elf2flash to manually create my own software flash file, specifying the
flash boot loader from "
../componenta/altera_nios2/boot_loader_cfi.srec" but this produced the
same result. Is this the correct boot loader?

In my software application's system library, I have set the Program
memory (.text), Read-only data memory (.rodata), and Read/write data
memory (.rwdata) to sdram. I intend for this code to actually execute
in SDRAM after being copied from Flash by the bootloader.

I'd like to hear from anyone if there is a problem with this set up.

Cheers,
Joseph Tan