"Antti Lukats" <antti@openchip.org> wrote in message
news:daelcs$vh$00$1@news.t-online.com...
> "Marco" <marcotoschi@_no_spam_email.it> schrieb im Newsbeitrag
> news:dael9c$vcg$1@news.ngi.it...
>>
>> "Antti Lukats" <antti@openchip.org> wrote in message
>> news:daecos$1nk$02$1@news.t-online.com...
>> > "Marco" <marcotoschi@_no_spam_email.it> schrieb im Newsbeitrag
>> > news:dae9vd$r6d$1@news.ngi.it...
>> >>
>> >> "Antti Lukats" <antti@openchip.org> wrote in message
>> >> news:dae8h6$pm0$01$1@news.t-online.com...
>> >> > "Marco" <marcotoschi@_no_spam_email.it> schrieb im Newsbeitrag
>> >> > news:dae5ja$pij$1@news.ngi.it...
>> >> >> Hallo,
>> >> >> I'm trying to connect a Spi 16 bit ADC to Opb_Spi core.
>> >> >>
>> >> >> Where I could find some software examples?
>> >> >>
>> >> >> I have made some searches into Google but I don't have found
> anything.
>> >> >>
>> >> >> The only example into EDK documentation is about an eeprom.
>> >> >>
>> >> >> What is the meaning of :
>> >> >> Status = XSpi_SetOptions(&Spi, XSP_MASTER_OPTION |
>> >> >> XSP_MANUAL_SSELECT_OPTION);
>> >> >>
>> >> >> In this way ADC is a master?
>> >> >>
>> >> >> When acquiring data, ADC must be set as a master?
>> >> >>
>> >> >> Many Thanks in Advance
>> >> >> Marco
>> >> >>
>> >> >>
>> >> >
>> >> > 1 there are no examples to be found by googling (my guess)
>> >> > 2 the meaning of what you asked is defined in the opb ip core
>> >> > manual,
>> > you
>> >> > better read it
>> >> >
>> >> > your setup seems to be OK, eg you set master and manual SS, that is
> you
>> >> > must
>> >> > yourself
>> >> > write to SS register to assert-deassert the ADC select signal
>> >> >
>> >> > Antti
>> >> > PS I almost always use a GPIO bit bang SPI emulation at first
> testing,
>> > the
>> >> > soft SPI code is a only a few lines of C code. only when the
>> >> > software
>> > SPI
>> >> > works with the connected hardware I proceed with special SPI
> hardware,
>> >> > controlling hardware SPI is usually more complex (need to read the
>> >> > manuals!!) then doing it 100% in sw.
>> >> >
>> >> >
>> >>
>> >> I posted because I don't have found the core manual very clear...
>> >>
>> >> I have another doubt: ADC is 16 bit, but XSpi_Transfer works with 8
>> >> bit
>> > data
>> >> buffer.
>> >>
>> >> That means to obtain a 16 data I must use 2 8bit buffers? In example a
>> >> vector of 2 elements?
>> >>
>> >
>> > no
>> > you use MANUAL SS assertion, you already had that setup in your code
>> > snippet
>> > actually
>> >
>> > so you set SS active
>> > do 8 bit transfer
>> > do another 8 bit transfer
>> > de assert SS
>> >
>> > ADC 'sees' one 16 bit transfer
>> >
>> > but I would says doing it that way is more complex and takes more time
>> > than
>> > bitbang software method
>> >
>> > Antti
>> >
>> >
>>
>> Could you explain what is bitbang software method, please?
>
> you connect your ADC SPI to 'normal' GPIO ports and set/clear the bits in
> software.
>
> the C code is maybe 10 lines for the SPI
>
> Antti
>
>
Ok, I'll try it!
Many Thanks to everyone for help and patience
Marco
Reply by Marco●July 5, 20052005-07-05
"Antti Lukats" <antti@openchip.org> wrote in message
news:daecos$1nk$02$1@news.t-online.com...
> "Marco" <marcotoschi@_no_spam_email.it> schrieb im Newsbeitrag
> news:dae9vd$r6d$1@news.ngi.it...
>>
>> "Antti Lukats" <antti@openchip.org> wrote in message
>> news:dae8h6$pm0$01$1@news.t-online.com...
>> > "Marco" <marcotoschi@_no_spam_email.it> schrieb im Newsbeitrag
>> > news:dae5ja$pij$1@news.ngi.it...
>> >> Hallo,
>> >> I'm trying to connect a Spi 16 bit ADC to Opb_Spi core.
>> >>
>> >> Where I could find some software examples?
>> >>
>> >> I have made some searches into Google but I don't have found anything.
>> >>
>> >> The only example into EDK documentation is about an eeprom.
>> >>
>> >> What is the meaning of :
>> >> Status = XSpi_SetOptions(&Spi, XSP_MASTER_OPTION |
>> >> XSP_MANUAL_SSELECT_OPTION);
>> >>
>> >> In this way ADC is a master?
>> >>
>> >> When acquiring data, ADC must be set as a master?
>> >>
>> >> Many Thanks in Advance
>> >> Marco
>> >>
>> >>
>> >
>> > 1 there are no examples to be found by googling (my guess)
>> > 2 the meaning of what you asked is defined in the opb ip core manual,
> you
>> > better read it
>> >
>> > your setup seems to be OK, eg you set master and manual SS, that is you
>> > must
>> > yourself
>> > write to SS register to assert-deassert the ADC select signal
>> >
>> > Antti
>> > PS I almost always use a GPIO bit bang SPI emulation at first testing,
> the
>> > soft SPI code is a only a few lines of C code. only when the software
> SPI
>> > works with the connected hardware I proceed with special SPI hardware,
>> > controlling hardware SPI is usually more complex (need to read the
>> > manuals!!) then doing it 100% in sw.
>> >
>> >
>>
>> I posted because I don't have found the core manual very clear...
>>
>> I have another doubt: ADC is 16 bit, but XSpi_Transfer works with 8 bit
> data
>> buffer.
>>
>> That means to obtain a 16 data I must use 2 8bit buffers? In example a
>> vector of 2 elements?
>>
>
> no
> you use MANUAL SS assertion, you already had that setup in your code
> snippet
> actually
>
> so you set SS active
> do 8 bit transfer
> do another 8 bit transfer
> de assert SS
>
> ADC 'sees' one 16 bit transfer
>
> but I would says doing it that way is more complex and takes more time
> than
> bitbang software method
>
> Antti
>
>
Could you explain what is bitbang software method, please?
Reply by Antti Lukats●July 5, 20052005-07-05
"Marco" <marcotoschi@_no_spam_email.it> schrieb im Newsbeitrag
news:dael9c$vcg$1@news.ngi.it...
>
> "Antti Lukats" <antti@openchip.org> wrote in message
> news:daecos$1nk$02$1@news.t-online.com...
> > "Marco" <marcotoschi@_no_spam_email.it> schrieb im Newsbeitrag
> > news:dae9vd$r6d$1@news.ngi.it...
> >>
> >> "Antti Lukats" <antti@openchip.org> wrote in message
> >> news:dae8h6$pm0$01$1@news.t-online.com...
> >> > "Marco" <marcotoschi@_no_spam_email.it> schrieb im Newsbeitrag
> >> > news:dae5ja$pij$1@news.ngi.it...
> >> >> Hallo,
> >> >> I'm trying to connect a Spi 16 bit ADC to Opb_Spi core.
> >> >>
> >> >> Where I could find some software examples?
> >> >>
> >> >> I have made some searches into Google but I don't have found
anything.
> >> >>
> >> >> The only example into EDK documentation is about an eeprom.
> >> >>
> >> >> What is the meaning of :
> >> >> Status = XSpi_SetOptions(&Spi, XSP_MASTER_OPTION |
> >> >> XSP_MANUAL_SSELECT_OPTION);
> >> >>
> >> >> In this way ADC is a master?
> >> >>
> >> >> When acquiring data, ADC must be set as a master?
> >> >>
> >> >> Many Thanks in Advance
> >> >> Marco
> >> >>
> >> >>
> >> >
> >> > 1 there are no examples to be found by googling (my guess)
> >> > 2 the meaning of what you asked is defined in the opb ip core manual,
> > you
> >> > better read it
> >> >
> >> > your setup seems to be OK, eg you set master and manual SS, that is
you
> >> > must
> >> > yourself
> >> > write to SS register to assert-deassert the ADC select signal
> >> >
> >> > Antti
> >> > PS I almost always use a GPIO bit bang SPI emulation at first
testing,
> > the
> >> > soft SPI code is a only a few lines of C code. only when the software
> > SPI
> >> > works with the connected hardware I proceed with special SPI
hardware,
> >> > controlling hardware SPI is usually more complex (need to read the
> >> > manuals!!) then doing it 100% in sw.
> >> >
> >> >
> >>
> >> I posted because I don't have found the core manual very clear...
> >>
> >> I have another doubt: ADC is 16 bit, but XSpi_Transfer works with 8 bit
> > data
> >> buffer.
> >>
> >> That means to obtain a 16 data I must use 2 8bit buffers? In example a
> >> vector of 2 elements?
> >>
> >
> > no
> > you use MANUAL SS assertion, you already had that setup in your code
> > snippet
> > actually
> >
> > so you set SS active
> > do 8 bit transfer
> > do another 8 bit transfer
> > de assert SS
> >
> > ADC 'sees' one 16 bit transfer
> >
> > but I would says doing it that way is more complex and takes more time
> > than
> > bitbang software method
> >
> > Antti
> >
> >
>
> Could you explain what is bitbang software method, please?
you connect your ADC SPI to 'normal' GPIO ports and set/clear the bits in
software.
the C code is maybe 10 lines for the SPI
Antti
Reply by Sylvain Munaut●July 5, 20052005-07-05
Hi Marco
> I posted because I don't have found the core manual very clear...
>
> I have another doubt: ADC is 16 bit, but XSpi_Transfer works with 8 bit data
> buffer.
>
> That means to obtain a 16 data I must use 2 8bit buffers? In example a
> vector of 2 elements?
Try reading your ADC manual.
Because SPI is more a matter of "Send 1 byte" "Read 1 byte" than what
the byte mean ... that all depends of the connected device.
Sylvain
Reply by Antti Lukats●July 5, 20052005-07-05
"Marco" <marcotoschi@_no_spam_email.it> schrieb im Newsbeitrag
news:dae9vd$r6d$1@news.ngi.it...
>
> "Antti Lukats" <antti@openchip.org> wrote in message
> news:dae8h6$pm0$01$1@news.t-online.com...
> > "Marco" <marcotoschi@_no_spam_email.it> schrieb im Newsbeitrag
> > news:dae5ja$pij$1@news.ngi.it...
> >> Hallo,
> >> I'm trying to connect a Spi 16 bit ADC to Opb_Spi core.
> >>
> >> Where I could find some software examples?
> >>
> >> I have made some searches into Google but I don't have found anything.
> >>
> >> The only example into EDK documentation is about an eeprom.
> >>
> >> What is the meaning of :
> >> Status = XSpi_SetOptions(&Spi, XSP_MASTER_OPTION |
> >> XSP_MANUAL_SSELECT_OPTION);
> >>
> >> In this way ADC is a master?
> >>
> >> When acquiring data, ADC must be set as a master?
> >>
> >> Many Thanks in Advance
> >> Marco
> >>
> >>
> >
> > 1 there are no examples to be found by googling (my guess)
> > 2 the meaning of what you asked is defined in the opb ip core manual,
you
> > better read it
> >
> > your setup seems to be OK, eg you set master and manual SS, that is you
> > must
> > yourself
> > write to SS register to assert-deassert the ADC select signal
> >
> > Antti
> > PS I almost always use a GPIO bit bang SPI emulation at first testing,
the
> > soft SPI code is a only a few lines of C code. only when the software
SPI
> > works with the connected hardware I proceed with special SPI hardware,
> > controlling hardware SPI is usually more complex (need to read the
> > manuals!!) then doing it 100% in sw.
> >
> >
>
> I posted because I don't have found the core manual very clear...
>
> I have another doubt: ADC is 16 bit, but XSpi_Transfer works with 8 bit
data
> buffer.
>
> That means to obtain a 16 data I must use 2 8bit buffers? In example a
> vector of 2 elements?
>
no
you use MANUAL SS assertion, you already had that setup in your code snippet
actually
so you set SS active
do 8 bit transfer
do another 8 bit transfer
de assert SS
ADC 'sees' one 16 bit transfer
but I would says doing it that way is more complex and takes more time than
bitbang software method
Antti
Reply by Marco●July 5, 20052005-07-05
"Antti Lukats" <antti@openchip.org> wrote in message
news:dae8h6$pm0$01$1@news.t-online.com...
> "Marco" <marcotoschi@_no_spam_email.it> schrieb im Newsbeitrag
> news:dae5ja$pij$1@news.ngi.it...
>> Hallo,
>> I'm trying to connect a Spi 16 bit ADC to Opb_Spi core.
>>
>> Where I could find some software examples?
>>
>> I have made some searches into Google but I don't have found anything.
>>
>> The only example into EDK documentation is about an eeprom.
>>
>> What is the meaning of :
>> Status = XSpi_SetOptions(&Spi, XSP_MASTER_OPTION |
>> XSP_MANUAL_SSELECT_OPTION);
>>
>> In this way ADC is a master?
>>
>> When acquiring data, ADC must be set as a master?
>>
>> Many Thanks in Advance
>> Marco
>>
>>
>
> 1 there are no examples to be found by googling (my guess)
> 2 the meaning of what you asked is defined in the opb ip core manual, you
> better read it
>
> your setup seems to be OK, eg you set master and manual SS, that is you
> must
> yourself
> write to SS register to assert-deassert the ADC select signal
>
> Antti
> PS I almost always use a GPIO bit bang SPI emulation at first testing, the
> soft SPI code is a only a few lines of C code. only when the software SPI
> works with the connected hardware I proceed with special SPI hardware,
> controlling hardware SPI is usually more complex (need to read the
> manuals!!) then doing it 100% in sw.
>
>
I posted because I don't have found the core manual very clear...
I have another doubt: ADC is 16 bit, but XSpi_Transfer works with 8 bit data
buffer.
That means to obtain a 16 data I must use 2 8bit buffers? In example a
vector of 2 elements?
Reply by Antti Lukats●July 5, 20052005-07-05
"Marco" <marcotoschi@_no_spam_email.it> schrieb im Newsbeitrag
news:dae5ja$pij$1@news.ngi.it...
> Hallo,
> I'm trying to connect a Spi 16 bit ADC to Opb_Spi core.
>
> Where I could find some software examples?
>
> I have made some searches into Google but I don't have found anything.
>
> The only example into EDK documentation is about an eeprom.
>
> What is the meaning of :
> Status = XSpi_SetOptions(&Spi, XSP_MASTER_OPTION |
> XSP_MANUAL_SSELECT_OPTION);
>
> In this way ADC is a master?
>
> When acquiring data, ADC must be set as a master?
>
> Many Thanks in Advance
> Marco
>
>
1 there are no examples to be found by googling (my guess)
2 the meaning of what you asked is defined in the opb ip core manual, you
better read it
your setup seems to be OK, eg you set master and manual SS, that is you must
yourself
write to SS register to assert-deassert the ADC select signal
Antti
PS I almost always use a GPIO bit bang SPI emulation at first testing, the
soft SPI code is a only a few lines of C code. only when the software SPI
works with the connected hardware I proceed with special SPI hardware,
controlling hardware SPI is usually more complex (need to read the
manuals!!) then doing it 100% in sw.
Reply by Marco●July 5, 20052005-07-05
Hallo,
I'm trying to connect a Spi 16 bit ADC to Opb_Spi core.
Where I could find some software examples?
I have made some searches into Google but I don't have found anything.
The only example into EDK documentation is about an eeprom.
What is the meaning of :
Status = XSpi_SetOptions(&Spi, XSP_MASTER_OPTION |
XSP_MANUAL_SSELECT_OPTION);
In this way ADC is a master?
When acquiring data, ADC must be set as a master?
Many Thanks in Advance
Marco