I don't know exactly what you're trying to do, but you should
be aware of these points:
1) The zero-ohm link model won't synthesise. Furthermore, it
misbehaves in some corner cases that may get you, depending
on what sort of logic appears at each end of the link.
2) The bidi-mux code you mention is effectively based on
a bidirectional tri-state buffer on the mux I/O. This is
OK, even inside an FPGA; as has been discussed here
several times, the tri-states will be mapped to muxes
by a synthesis tool; but you will need to be VERY careful
to ensure that the direction-control bit is correctly
manipulated.
Given that the bidi-mux needs a proper direction control
signal, I don't see what you're gaining by all this palaver.
--
Jonathan Bromley, Consultant
DOULOS - Developing Design Know-how
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Doulos Ltd., 22 Market Place, Ringwood, BH24 1AW, UK
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