USB-FPGA : Introduction

Christopher FeltonJanuary 12, 20111 comment

This blog is an introduction to a series of blogs I hope to write.  The blogs will cover the design and experiences I had on a project that spanned the last 6 years.  The project was the development of an USB FPGA board and the supporting gateware, firmware, and software.  The project has had different levels of activity over the years, ranging from none to some, but it has been an ongoing project, albeit, during sleepless nights.  Lately, I have ported the HDL (gateware) portion of the design from Verilog to MyHDL (more on this later).  Now seemed like an appropriate time to look back and reflect on the project.

Background

Way back in 2004 a friend was looking to design new hardware and software for his CNC machine.  It sounded like an interesting project and I started working with him.  His existing hardware, in 2004, interfaced the motor control circuits to the PC through the parallel port.  Because parallel ports were not very common on PCs the first design decision was to add a USB interface.  It was also decided that high-speed USB (480Mbps) was desirable.  Back then the only reasonable high-speed USB controller was the Cypress FX2(LP).  The FX2 was chosen for the design.

The original CNC software generated the waveforms needed to control the motors directly.  These digital waveforms were driven over the parallel port to the motor drivers.  To support a larger number of motors (simultaneous motor control) and higher precision it was decided that an FPGA would be used.  The motor control and waveforms would be generated in the FPGA.  Higher level commands would be sent to the FPGA from the software.  The Spartan3 was relatively new at this time and a mid-size Spartan3 was chosen for the board.

We decided to spin a PCB with the high-speed USB controller and the FPGA only.  We decided to first develop the interface framework.  The motor drivers and control logic would be developed later.  Also, early on we had decided to make the USB-FPGA interface design an open-source project. 

The Interface Project @ 30e3 Feet

The interface project, dubbed USBP, would include the design and implementation of: a PCB, FPGA gateware, FX2 firmware, and PC software.

USBP

The goal of the project was to expose a set a simple functions to Python that could communicate with the FPGA hardware.  A basic address read/write interface and a streaming interface would be developed.  The FX2 supports multiple endpoints, one set would be used for the memory mapped access and another set as a data streaming pipe.

Remember, this is a look back on a project that started in earnest in 2004.  Products like the FTDI high-speed variants (480Mbps) were not available.  The FX2 was used successfully on other projects like the GnuRadio hardware (USRP) and some commercial products with similar goals, example OpalKelly. 

Personally I like the Cypress USB controllers over the FTDI parts but I know the FTDI parts are popular with developers.  And the JTAG interface on the newer FTDI parts are supported by many of the FPGA vendors software.

Other Supported Hardware

Although hardware was part of the project development the gateware, firmware, and software was designed to support other hardware (PCBs) as well.  Boards supported by the project:

  • UFO400, USBProject
  • Signa-X1, DSPtronics
  • Nexsys2, Digilent
  • XEM3001, Opal Kelly

I will try and incorporate examples from each of the above boards in the subsequent posts.

OPEN-SOURCE Projects

This was the first open-source project I had created or participated on.  I was not sure what to expect.  But I was optimistic and naive.  I believed creating an open-source project we would get some useful input and possibly some contributions.  For this project that did not happen.  For a project of limited scope it did have a respectful number of downloads,.  But there were minor feedback and no collaboration.

I was a little disappoint but my expectations were probably not realistic.  As many would guess and the book Wikinomics points out; there are limited number of developers with the expertise that are willing to donate their time.  And a multitude of projects for these developers to pick from.  I have seen many other projects, which I thought would be huge successes, also suffer the same fate (I am sure most can list a few).

Despite not having an open-source success the USBP framework was used for a couple external and commercial projects, including but not limited to:

  • Radar
  • Satellite Communication
  • Custom Modems
  • Basic Logic Interfacing and Control

But the USBP framework was never used to finish the original CNC project (the project was never finished).  After developing the PCB, gateware, firmware, and software we got distracted applying the framework to other projects like SDR and DXing.

Conclusion

This project as a hobby was a blast.  I enjoyed working on the project and working with the initial partner in crime.  As an open-source project I would consider it a failure.  At least from a selfish perspective.  It takes some work and consideration to create and organize an open-source project.  It is difficult to quantify if the work creating and managing an open-source project is worth it but I wouldn’t do it any different except adjusting my expectations. 

 


Previous post by Christopher Felton:
   A Bit Bucket had Holes
Next post by Christopher Felton:
   MyHDL FPGA Tutorial I (LED Strobe)

Comments:

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Comment by newshaApril 23, 2012
Hi i want use a fir core in my design but don't understand related between clock and sampel frequency. Can you help me? my email; newsha_27@yahoo.com Thx

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