Designing Embedded System with FPGA - 1
With the introduction of soft processors and related tools (like EDK from Xilinx), implementation of basic embedded system in FPGA is made easy. This requires very little or almost no knowledge of VHDL programming. Actually that’s how I started. If user is interested in taking full advantage of FPGA and its parallel processing power, then yes, detail understanding of soft processor, its peripheral bus and VHDL programming is required.
I will start with basic system with FPGA. Xilinx has embedded system development tool called EDK, which is very powerful and mature. Along with EDK, Xilinx provides, following IP (Intellectual property) cores, ready to use like drag, drop, configure and go.
-Soft processor Microblaze
-BRAM blocks and controller
-OPB (IBM’s Open Peripheral Bus with full description)
-Timers and GPIO port
-Lite version of UART and SPI bus
-8 hours limited Ethernet MAC core
-DDR RAM controller and flash memory controller
-Interrupt controller and DMA controller and many more.
Latest revision of EDK is kind of graphical tool where, user has to select IP cores from list and drop on design pad. EDK also has base system builder which enables user to generate whole design automatic. First design is based on SPARTAN 3E Starter kit which is valued by Xilinx some where around $149 including EDK.
Install the software and run it. The first screen shows up as shown here, click on “base system builder”.
(For more reference look at Xilinx tutorial at,
Then select your folder and project name on second screen and click ok. (For your reference sample entries for second screen is shown here)
You will hit next screen where you have choice between predefined board as well as creating custom design. Click on “I would like to create a new design” and go to following screen and select Xilinx -> SPARTAN 3E Starter kit -> revD (or what ever revision board you have).
(Xilinx has much starter kit to learn FPGA based embedded system and out of this the most economical solution is SPARTAN 3E starter kit. )
Select next to reach processor selection screen where the only choice is Microblaze (as SPARTAN 3E does not have POWERPC core available), which is by default selected, so press next to design your custom settings for Microblaze processor. Parameters available for selection are speed, availability of RAM, cache enable/disable and floating point coprocessor support. Out of this we will select 50 MHz (default) speed and 32 KB RAM and leave other settings as default for first design. The screen with all required selection will look like as below,
In next couple of screen we will select required peripherals out of available in base system builder. For first design we will select only buttons, LEDs and one RS232 port as peripherals. For RS232 only the OPB-UARTLite core is available free from Xilinx so we will select that. For RS232 port we will select 9600, 8, No parity and no interrupt. The UART lite core works with one start and one stop bits. Similarly we will not select interrupt for LEDs or buttons for first design. The selection screens looks like,
Then select “next” until you hit software setup screen, where by default STDIN and STDOUT are directed to RS232-DCE and memory test and peripheral test are selected. Keep those default settings as it is and click next.until you get “system created” screen. Select generate and you will reach the final “finish” screen as shown here. The screen has all information about newly generated system, read it carefully, it lists all important project files.
Click on “finish”, software will generate and display newly designed system on EDK platform. The newly designed system will look like, this has all hardware logic files for FPGA as well as all software *.c and *.h files for embedded application, which tests memory and peripheral and transmit messages on RS232 port. We will talk about compilation and execution of new system next time.
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