VIRTEX v Spartan 3

Out of interest, would anyone happen to know what is the difference in
performance between a Virtex fpga (not vitex 2) and its equivalent
Spartan3???

Thanks 
C

C,

Not enough information, so I will answer a lot of what you did not ask.

Virtex is 6 years old, 0.22 micron technology, Core Vccint = 2.5 volts. 
    You can look up its speed and capabilities on the website to see how 
it performs.  Just as a measure, designs can run at 150 MHz with some 
care.  A real workhorse, and still being used, but seldom do we hear 
about it being designed into new equipment.  The Mars rovers use 6 
V1000's each, for example, to keep the wheels turning, as well as other 
supervisory tasks.  It has 5V compatibility, hot swap bus without any 
power sequencing, and some other really nice features that still make it 
a chip of choice.  Works at PCI-66 MHz.  Has the first Digital Locked 
Loops(DLL), dual port BRAM.

http://www.xilinx.com/prs_rls/design_win/0412_marsrover.htm

Virtex E is about 5 years old, 0.18/0.15u hybrid, core Vccint=1.8 volts. 
  Designs can run at 200 MHz with some care.  Virtex E is still being 
designed in, but has virtually replaced all Virtex designs (as it is pin 
compatible and lower cost), but is now less of a designers choice with 
Virtex II and Virtex II Pro being the more common choice.  Like Virtex, 
it is also 5V tolerant, and hot swap bus friendly.  Also a PCI-66 MHz 
choice.  More DLL's.  More BRAM.

Virtex II is about 3 years old, 0.15u, core Vccint=1.5 volts.  Designs 
can run at 350 MHz with some care, with some designs running a bit 
faster in the fastest speedgrade.  Virtex II is being designed into many 
new boards.  VII requires a resistor for 5V tolerance, and also requires 
that Vcco be biased on to be hot swap bus friendly.  First PCI-X 133 MHz 
FPGA.  First appearance of the Digital CLock Manager, with both a DLL, 
and a frequency synthesizer (DFS).  More BRAM.

Virtex II Pro is the lead family, at 0.13u, and also with a Vccint of 
1.5 volts.  As VII Pro is a better price/performance/capability choice, 
with designs at 420 MHz with some care, it is definitely the hands down 
winner right now, with an amazing number of new design-ins every month.
Added IBM 405 PowerPC's (tm), and multi-gigabit 3.125 Gbs transceivers. 
  More BRAM.  Faster IO.

http://www.xilinx.com/prs_rls/silicon_vir/0411v2_recrev.htm

Virtex II Pro-X exchanges the 3.125 Gbs transceiver for 10 Gbs 
transceivers.  An industry first.

http://www.xilinx.com/prs_rls/end_markets/0472atca10g.htm

Virtex 4 has been announced as being the next family, at 90 nm, 
Vccint=1.2 volts, and a performance of about 500 MHz (and more), and 
general IOs capable of 1 Gbs.  See the press announcements for all of 
the features that are new.

http://www.xilinx.com/prs_rls/silicon_vir/0465v4arch.htm

Spartan 3 is about a year old, 90 nm with a Vccint=1.2 volts, and was a 
redesign of Virtex II for cost.  It offers similar performance to a slow 
speed grade Virtex II, but with fewer IO standards, and some other 
things removed to reduce the die area and cost.  It has DCMs, and 18X18 
multipliers.  It is commonly used to replace ASICs up to very large 
volumes (see our press release on sold to date figures).

http://www.xilinx.com/prs_rls/silicon_spart/0471spartanleadership.htm

So, if I take you literally, the original Virtex part is probably half 
the speed of a Spartan 3, and since the Virtex part did not have 18X18 
multipliers, or DCM's, a Spartan 3 would be a much more powerful chip, 
as well as being far less expensive.

The original Virtex is also available as Spartan 2, as is the Virtex E 
line as Spartan 2E (smaller gate count parts).

6 products, in 6 years!  It will be my 6 year anniversary here at Xilinx 
at the end of this month, and I have had the privilege to be involved in 
all of the above products.

Austin

chuk wrote:
> Out of interest, would anyone happen to know what is the difference in
> performance between a Virtex fpga (not vitex 2) and its equivalent
> Spartan3???
> 
> Thanks 
> C

Depends.  Speed grade, critical paths in design both play into it.
Roughly speaking the 3S-5 is around the same speed as a VirtexE-6, for ~16
bit arithmetic.  Faster for random logic without carry chains.
Regardless, it is not a linear relationship.  Spartan3 has a different
architecture and the speeds of different elements changed by different
amounts.

chuk wrote:

> Out of interest, would anyone happen to know what is the difference in
> performance between a Virtex fpga (not vitex 2) and its equivalent
> Spartan3???
>
> Thanks
> C

--
--Ray Andraka, P.E.
President, the Andraka Consulting Group, Inc.
401/884-7930     Fax 401/884-7950
email ray@andraka.com
http://www.andraka.com

 "They that give up essential liberty to obtain a little
  temporary safety deserve neither liberty nor safety."
                                          -Benjamin Franklin, 1759

I'm looking forward to comments from the CAF regulars on that statement,
Austin! Are we talking 'marketing' years or 'you can buy them' years? Is it
true that in China your age counts from conception? Maybe Spartan 3 is
following that rule? The extra 9 months to sort out the will we/won't we
low-k thing.
With tongue in cheek, Syms.
"Austin Lesea" <austin@xilinx.com> wrote in message
news:cb9p4v$cmu2@cliff.xsj.xilinx.com...
>
> Spartan 3 is about a year old,

Symon,

Very funny.

So we are unbelievably successful with S3.  Is that our fault that we 
somehow did not figure that they would be instantly shipped once they 
got packaged?

Triple whammy: 1) great part 2) great price 3)dot.com ending.

Did you bother to read the S3 press release?  500K S3's in 2003?

That is one helluva lot of FPGAs.....

Some would have you beleive that 90nm was "too risky" and "had 
availability issues" .... that is until they have their 90nm offering!

Never even considered lo-K for S3 (too much $$$ for too little benefit).

Lo-K was a Virtex II Pro 'issue' that we had to correct by process 
tweaks and design.  Let's face it, if we can still meet all of the 
specifications without lo-K, why bother with the cost and reliability 
issues?

Austin



Symon wrote:
> I'm looking forward to comments from the CAF regulars on that statement,
> Austin! Are we talking 'marketing' years or 'you can buy them' years? Is it
> true that in China your age counts from conception? Maybe Spartan 3 is
> following that rule? The extra 9 months to sort out the will we/won't we
> low-k thing.
> With tongue in cheek, Syms.
> "Austin Lesea" <austin@xilinx.com> wrote in message
> news:cb9p4v$cmu2@cliff.xsj.xilinx.com...
> 
>>Spartan 3 is about a year old,
> 
> 
> 

Provided you don't use the carry chain.

Austin Lesea wrote:

> C,
>
> Virtex II is about 3 years old, 0.15u, core Vccint=1.5 volts.  Designs
> can run at 350 MHz with some care, with some designs running a bit
> faster in the fastest speedgrade.  Virtex II is being designed into many

--
--Ray Andraka, P.E.
President, the Andraka Consulting Group, Inc.
401/884-7930     Fax 401/884-7950
email ray@andraka.com
http://www.andraka.com

 "They that give up essential liberty to obtain a little
  temporary safety deserve neither liberty nor safety."
                                          -Benjamin Franklin, 1759

Austin Lesea wrote:

> Symon,
> 
> Very funny.
> 
> So we are unbelievably successful with S3.  Is that our fault that we 
> somehow did not figure that they would be instantly shipped once they 
> got packaged?
> 
> Triple whammy: 1) great part 2) great price 3)dot.com ending.

er ? In this part of the world, (and many others) dot.com == dot.bomb
- is that what you meant to convey ?

> 
> Did you bother to read the S3 press release?  500K S3's in 2003?
> 
> That is one helluva lot of FPGAs.....

  The other press release says $750M in Spartans (all suffixes) and 80M 
pcs. ( ASP of just over $9)
  So that makes your 'helluva lot' just 0.625% of the total shipped,
and Xilinx gives excuses for not being able to meet demand ?.
  It is OK to 'chest beat' about "your new asic", but if Xilinx cannot
attain ASIC volumes, you will have to work hard to get those
design wins.
  -jg

Jim,

See below,

Austin

Jim Granville wrote:

> Austin Lesea wrote:
> 
>> Symon,
>>
>> Very funny.
>>
>> So we are unbelievably successful with S3.  Is that our fault that we 
>> somehow did not figure that they would be instantly shipped once they 
>> got packaged?
>>
>> Triple whammy: 1) great part 2) great price 3)dot.com ending.
> 
> 
> er ? In this part of the world, (and many others) dot.com == dot.bomb
> - is that what you meant to convey ?
> 

Yes.

>>
>> Did you bother to read the S3 press release?  500K S3's in 2003?
>>
>> That is one helluva lot of FPGAs.....
> 
> 
>  The other press release says $750M in Spartans (all suffixes) and 80M 
> pcs. ( ASP of just over $9)
>  So that makes your 'helluva lot' just 0.625% of the total shipped,
> and Xilinx gives excuses for not being able to meet demand ?.
>  It is OK to 'chest beat' about "your new asic", but if Xilinx cannot
> attain ASIC volumes, you will have to work hard to get those
> design wins.
>  -jg
> 

I see the glass as half full, you see it as totally empty.  All a matter 
of perspective.

One could say that any recently introduced product is a 'failure' 
because it does not even register on the combined income of the last 
three products.

No excuses offered, merely an explanation.

Austin Lesea wrote:
> Jim,
> 
<snip>
>>> Did you bother to read the S3 press release?  500K S3's in 2003?
>>>
>>> That is one helluva lot of FPGAs.....
>>
>>
>>
>>  The other press release says $750M in Spartans (all suffixes) and 80M 
>> pcs. ( ASP of just over $9)
>>  So that makes your 'helluva lot' just 0.625% of the total shipped,
>> and Xilinx gives excuses for not being able to meet demand ?.
>>  It is OK to 'chest beat' about "your new asic", but if Xilinx cannot
>> attain ASIC volumes, you will have to work hard to get those
>> design wins.
>>  -jg
>>
> 
> I see the glass as half full, you see it as totally empty.  All a matter 
> of perspective.
> 
> One could say that any recently introduced product is a 'failure' 
> because it does not even register on the combined income of the last 
> three products.
> 
> No excuses offered, merely an explanation.

You may have missed the point a little.
* Symon commented on the general availability of S3 devices.
* You explained that customer demand exceeded Xilinx's ability to supply.
* I looked at the WEB references you gave, and they indeed confirm that
actual volumes of the S3 are not great, for 2003.

  All three can be true, and I am not sure where 'totally empty' and
'failure' come from; your words, not mine.

  Of course they are new, and yes they are ramping, but the stats 
indicate a 2003 run rate of maybe 20M pcs/yr in Spartan ( educated guess 
from 80M over 6 yrs).
  With S3 numbers being appx 1/40 of Spartan shipments, that would seem 
to be very early in the ramp - which confirms Symon's observation.

  Could you give us 1H 2004 volumes, and present lead times, for S3
devices ?
  As a designer, a valid question is: Has Xilinx 'caught up' enough, so 
that a design could use these devices, and not have a supply problem ?

-jg

Jim Granville <no.spam@designtools.co.nz> wrote:
...
:   Could you give us 1H 2004 volumes, and present lead times, for S3
: devices ?
:   As a designer, a valid question is: Has Xilinx 'caught up' enough, so 
: that a design could use these devices, and not have a supply problem ?

If at least distributors could offer (paid) engineering samples, not only
long lead times... 
-- 
Uwe Bonnes                bon@elektron.ikp.physik.tu-darmstadt.de

Institut fuer Kernphysik  Schlossgartenstrasse 9  64289 Darmstadt
--------- Tel. 06151 162516 -------- Fax. 06151 164321 ----------