Problems with a Virtex-II Engineering Sample

Hello all,

We are currently doing a project where we would like to evaluate the
advantages of the PPC405 hard processor core in the Virtex-II Pro FPGA
compared to the Microblaze soft core. We've got the Microblaze up and
running but we are struggling to get the PPC to execute any code.

The chip is an Engineering Sample:

Virtex-II Pro
XC2VP7
FF672ALB0237
D127316A
6C-ES

The program is a very simple one - just trying to get a diod on the
board to flash. In our EDK project, under S/W settings, we are unable to
select Mode - Executable. XmdStub is pre-selected and grayed out.
Therefore we suspect that the code is compiled to run in a debugging
mode.
After the circuit has been programmed through the JTAG interface (thus
the JTAG is properly connected and working) we try to use the XMD
debugger to connect to the PPC405 JTAG port. (We've tried to connect
both directly to the PPC405 JTAG and to the normal JTAG chain).
XMD then presents us with an error message:

ERROR: Unable to connect to PowerPC target. Invalid Prcessor Version No
0x00000000
Unable to establish connection to the PowerPC target. Make sure the
PPC405 JTAG signals are connected to the JTAGPPC primitive and the cable
connections are correct.

The question is - is it possible to get EDK to compile the code to
execute straight away without the need of a debugger and JTAG
connection? If not, any suggestion on what might be wrong is highly
appreciated. Could the error message have anything to do with the fact
that we're using an Engineering Sample of the chip?

Best Regards,

Jonas Floden
Bjorn Saete

Tjena,

Yes, The executable can be directly merged into the bitfile, if your 
executable is running from internal BRAM.
If you run out of external memory, you need to download executable to 
the external memory.

How did you create your system?
Did you use the Base System Builder?

G�ran Bilski

Jonas Floden wrote:

> Hello all,
>
> We are currently doing a project where we would like to evaluate the
> advantages of the PPC405 hard processor core in the Virtex-II Pro FPGA
> compared to the Microblaze soft core. We've got the Microblaze up and
> running but we are struggling to get the PPC to execute any code.
>
> The chip is an Engineering Sample:
>
> Virtex-II Pro
> XC2VP7
> FF672ALB0237
> D127316A
> 6C-ES
>
> The program is a very simple one - just trying to get a diod on the
> board to flash. In our EDK project, under S/W settings, we are unable to
> select Mode - Executable. XmdStub is pre-selected and grayed out.
> Therefore we suspect that the code is compiled to run in a debugging
> mode.
> After the circuit has been programmed through the JTAG interface (thus
> the JTAG is properly connected and working) we try to use the XMD
> debugger to connect to the PPC405 JTAG port. (We've tried to connect
> both directly to the PPC405 JTAG and to the normal JTAG chain).
> XMD then presents us with an error message:
>
> ERROR: Unable to connect to PowerPC target. Invalid Prcessor Version No
> 0x00000000
> Unable to establish connection to the PowerPC target. Make sure the
> PPC405 JTAG signals are connected to the JTAGPPC primitive and the cable
> connections are correct.
>
> The question is - is it possible to get EDK to compile the code to
> execute straight away without the need of a debugger and JTAG
> connection? If not, any suggestion on what might be wrong is highly
> appreciated. Could the error message have anything to do with the fact
> that we're using an Engineering Sample of the chip?
>
> Best Regards,
>
> Jonas Floden
> Bjorn Saete
>

Hejsan,

We created the system in Platform Studio (was unable to use BSB because 
we've got a custom board) and added the required components and ports 
according to the tutorial on http://www.eece.unm.edu/xup/ml300ppc405.htm
A few modification were made but we are pretty sure we got this bit right.
We reckon the main problem is that Platform Studio won't let us select 
"executable" under S/W Settings -> Mode. Well, actually it can be 
selected, but if you go "OK" and then check again it is back to 
"XmdStub". Is it the case that if XmdStub is selected, then the program 
will not execute without the debugger? How can this be changed?

The program is included in the bitfile through the "Update Bitstream" 
option in XPS.

Many thanks for any replies,


> Tjena,
> 
> Yes, The executable can be directly merged into the bitfile, if your executable is running from internal BRAM.
> If you run out of external memory, you need to download executable to the external memory.
> 
> How did you create your system?
> Did you use the Base System Builder?
> 
> G�ran Bilski 

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Hi,

im currently trying to config a virtexII (xc2v2000) by the slave
selectMap mode via a vme interface.

the fpga react fine the stimuli on the prog_b signal (init goes low and
back to to high )

then i set rdwr_b to low, present the first data byte (oxff) and set
then cs_b to low

the busy signal is low also cclk is low

the i generate one cclk cycle 010 (very slow rate, 8�s high periode )

shortly before the cclk signal goes again to low, the busy signal is be
asserted (high) by the fpga and will only be de-asserted after deselect
the fpga (cs_b = high)

the configuration fails



Any idea to solve this problem ?

Regards

andreas
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Jonas,
	I'm assuming you are using EDK 6.2. The mode of XMDSTUB v/s EXECUTABLE 
can be selected on per application basis. Go to the Sw Applications tab 
in the left column and for your application, right click --> Compiler 
Options.

In this dialog box,you will fix option to choose between xmdstub and 
executable mode.

Amit

Jonas Floden wrote:
> Hello all,
> 
> We are currently doing a project where we would like to evaluate the
> advantages of the PPC405 hard processor core in the Virtex-II Pro FPGA
> compared to the Microblaze soft core. We've got the Microblaze up and
> running but we are struggling to get the PPC to execute any code.
> 
> The chip is an Engineering Sample:
> 
> Virtex-II Pro
> XC2VP7
> FF672ALB0237
> D127316A
> 6C-ES
> 
> The program is a very simple one - just trying to get a diod on the
> board to flash. In our EDK project, under S/W settings, we are unable to
> select Mode - Executable. XmdStub is pre-selected and grayed out.
> Therefore we suspect that the code is compiled to run in a debugging
> mode.
> After the circuit has been programmed through the JTAG interface (thus
> the JTAG is properly connected and working) we try to use the XMD
> debugger to connect to the PPC405 JTAG port. (We've tried to connect
> both directly to the PPC405 JTAG and to the normal JTAG chain).
> XMD then presents us with an error message:
> 
> ERROR: Unable to connect to PowerPC target. Invalid Prcessor Version No
> 0x00000000
> Unable to establish connection to the PowerPC target. Make sure the
> PPC405 JTAG signals are connected to the JTAGPPC primitive and the cable
> connections are correct.
> 
> The question is - is it possible to get EDK to compile the code to
> execute straight away without the need of a debugger and JTAG
> connection? If not, any suggestion on what might be wrong is highly
> appreciated. Could the error message have anything to do with the fact
> that we're using an Engineering Sample of the chip?
> 
> Best Regards,
> 
> Jonas Floden
> Bjorn Saete
> 

Hello,

unfortunately we have edk 6.1, where that tab doesn't exist.

// Jonas

I've had this exact problem. Here's how I solved it. I'm using version
6.2 of the Xilinx ISE and EDK.

Make sure you are downloading the bootloop application to the PowerPC
target during development. When you download a user application that
enables interrupts and then try and connect to the PowerPC with XMD
the PowerPC may have already wedged itself (especially if your code is
incorrect). Once I initialized the target with a bootloop to execute
and then later used XMD to download my interrupt supported code did
the error go away.

Zach Pfeffer
http://ece.colorado.edu/~pfefferz

Thank you for your information.

Am I correct that a bootloop application would bee something as simple as

loop:
      b loop

and be placed at address 0xFFFFFFFE (the start address for the PPC405)

How would I do that? Do I need to do it manually?
We are using EDK and ISE version 6.1

Cheers

// Jonas

Ok, this is how I eventually solved it

bootloop.asm:
loop:
       b loop


powerpc-eabi-as bootloop.asm -o boot.o
powerpc-eabi-ld -e 0xFFFFFFFC -Ttext 0xFFFFFFFC -l
<path to EDK-project>/ppc405_0/lib -o bootloop.elf

data2bram -bm <path to EDK-project>/implementation/system.bmm
-bd bootloop.elf -bt <path to EDK-project>/implementation/system.bit
-o b download.bit -p <Virtex target>

And then the JTAG connection worked!
Tnx for the help!

// Jonas

That's great!

Sorry I didn't get back to you sooner.

-Zach