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The USB FPGA?

Started by Theo Markettos May 4, 2014
On Tue, 06 May 2014 01:12:34 +0100, Theo Markettos wrote:

> Allan Herriman <allanherriman@hotmail.com> wrote: >> I'll second the "USB is crap" comment. > > It may be.
I should clarify. I've made many boards over the years, using a variety of interface standards. USB has never struck me as being elegant or efficient. Its ubiquity, low cost (in volume), a robust connector and power on the same cable as the signals seem to be its biggest plusses. The USB physical layer isn't too bad, IMO. Most of the issues encountered during development are to do with the (software) drivers. That and the reuse of VID / PID values by cheap knock-off clone gizmos that don't quite match the functionality of the original, yet are still expected to work. (That isn't the fault of the USB standard though.) Other posters mentioned the need to purchase an official VID / PID. The process is too expensive for low volume or hobby projects. USB isn't alone there - for example my current employer owns an Ethernet OUI (a big block of MAC addresses) as well as an Ethertype (protocol specifier). Both of those cost money, but it's a modest once-off cost unlike the annual charge from USB-IF. Another thing to consider is that for (e.g.) Ethernet, there are MAC addresses and Ethertypes that you can use for your hobby projects and experimental protocols that won't get you into trouble. The USB-IF don't provide VID / PID values intended for a similar purpose. (I understand that if you buy a VID with the purpose of making it "free" they will come after you.)
> But look at your FPGA. How do you connect it to your PC? > It might have ethernet or PCIe, but almost invariably what comes first > is USB.
It's the opposite for me. If one of my boards with an FPGA on it is connecting to a PC, it'll be via Ethernet. During debugging, I might rarely use USB to connect a JTAG pod to my PC though.
>> If you must use USB2, I recommend using external PHY parts. > > This is the wrong solution
I respectfully disagree. One thing that you might like to consider is the I/O required for USB2. It matches well to the sort of process that you would use for a $2 microcontroller, but not so well to the low voltage I/O that you'd find on a 28nm FPGA. There are also analog functions that are needed that you will not find on an FPGA. FPGA vendors don't like including anything that doesn't have wide applicability. OTOH USB3 uses serial signalling that might be a good match for FPGA transceivers. I haven't looked closely enough at the standard to know for sure, but I suspect there will be problems with idle or sleep (or something like that). OTOH, FPGA transceivers now have support for the analog signalling for SATA, so if there's enough demand in the marketplace, anything can happen. I only put a USB3 controller into a product once - a (then new) NEC / Renesas part that connected to my system using PCIe, so I can't claim to be a USB3 expert. I'm also aware that low speed (1.5Mb/s) USB can be bit-bashed in software on a cheap microcontroller. I don't think it would be compliant with the spec but it does seem to work and is extremely cheap. That really sounds like it could easily fit into an FPGA, possibly with the addition of some external level translators.
> because those [PHY] chips are never there when you > need them.
I know you're talking about boards, but if you were talking about part availability, that would be a good point. USB is used in consumer products, and this means that the parts sometimes have short production lives. Some years ago I designed a USB2 hub from ST-Ericcson into a product. They had been made obsolete before our second production run. Now there's an SMSC one in its place. Since then, SMSC has been bought by Microchip and who knows what's going to happen. Those issues can apply to any part on your board though, and aren't unique to USB. (Has anyone tried to get DDR3 RAM chips when some company in China is manufacturing a large batch of tablets?)
> If you're doing your own board you can put on one, but many > dev boards don't have them.
I don't use dev boards, so I really shouldn't comment.
> Why isn't USB2 an FPGA programming option (in addition to JTAG)?
Substitute the string "PCIe" for "USB2" and you have a question I asked of the local Altera and Xilinx reps about five years ago. I'm still waiting for a good solution to that problem that doesn't involve putting a "bootloader" NVM on the board to configure the FPGA just so it can talk PCIe to get the rest of the configuration. My guess: USB2 - never. USB3 - a very remote possibility. Regards, Allan
On Tuesday, May 6, 2014 9:17:25 AM UTC-4, Allan Herriman wrote:
> USB isn't alone there - for example my current employer owns an Ethernet=
=20
> OUI (a big block of MAC addresses) as well as an Ethertype (protocol=20 > specifier). Both of those cost money, but it's a modest once-off cost=20 > unlike the annual charge from USB-IF. >=20
The annual charge is not mandatory, it is only to allow you to license use = of their logos on new products. You can simply pay the first year (which g= ets you your VID) and never pay again. If having the USB logo is important= to your product marketing, then you do have to pay for that privilege. Bo= ttom line is that the first year $$ gets you the VID (and the use of logos = if you choose); subsequent year's $$ allows you to continue to use logos.
> Another thing to consider is that for (e.g.) Ethernet, there are MAC=20 > addresses and Ethertypes that you can use for your hobby projects and=20 > experimental protocols that won't get you into trouble. The USB-IF don't=
=20
> provide VID / PID values intended for a similar purpose. (I understand=
=20
> that if you buy a VID with the purpose of making it "free" they will come=
=20
>=20
A hobby project can use any VID since they do not need to worry about inter= operability with anything that the hobbyist doesn't already know about. Pr= oviding something for 'free' takes it a bit outside of the realm of a stric= t 'hobby' which may open you up to folks coming after you as you say. Kevin Jennings
Allan Herriman <allanherriman@hotmail.com> wrote:
> I should clarify. I've made many boards over the years, using a variety > of interface standards. USB has never struck me as being elegant or > efficient. Its ubiquity, low cost (in volume), a robust connector and > power on the same cable as the signals seem to be its biggest plusses.
I agree. It's the ubiquity that makes it really hard to ignore. (looks at laptop: available ports are Thunderbolt - an obfuscated version of PCI Express that's impossible for normal mortals to use[1] - and USB3.)
> Other posters mentioned the need to purchase an official VID / PID. The > process is too expensive for low volume or hobby projects.
Presumably an FPGA could come with a default manufacturer VID/PID, which is device class FF and has a higher level protocol for arbitrating functionality. If you then want to sell it as a product that implements a standard device class then you need apply for a VID/PID. But you have flexibility to do other things (eg ship the first version of your product as an FPGA, then switch to ASIC using the same driver and VID/PID code. Or impersonate another device for interoperability).
> It's the opposite for me. If one of my boards with an FPGA on it is > connecting to a PC, it'll be via Ethernet.
How do you program it? Do you have an onboard Ethernet to JTAG converter?
> I respectfully disagree. One thing that you might like to consider is > the I/O required for USB2. It matches well to the sort of process that > you would use for a $2 microcontroller, but not so well to the low > voltage I/O that you'd find on a 28nm FPGA.
That sounds plausible. Except every phone SoC has a USB OTG port - and some of those are 28nm and not exactly low performance.
> There are also analog functions that are needed that you will not find on > an FPGA. FPGA vendors don't like including anything that doesn't have > wide applicability.
Looking at die shots, USB on the Tegra 2 takes up about 1% of die area on a 40nm process (couldn't find any labelled 28nm photos) - that's roughly 0.5mm2. I suppose that could be too high a price to pay, though I wonder how hard PCIe compares? OTOH a USB hard core wouldn't necessarily have all the features of Tegra's, because you'd want the backend of it to be in configurable soft logic.
> OTOH USB3 uses serial signalling that might be a good match for FPGA > transceivers. I haven't looked closely enough at the standard to know > for sure, but I suspect there will be problems with idle or sleep (or > something like that). OTOH, FPGA transceivers now have support for the > analog signalling for SATA, so if there's enough demand in the > marketplace, anything can happen.
That would be interesting. Is USB3 generally more sane in your opinion?
> I'm also aware that low speed (1.5Mb/s) USB can be bit-bashed in software > on a cheap microcontroller. I don't think it would be compliant with the > spec but it does seem to work and is extremely cheap. > That really sounds like it could easily fit into an FPGA, possibly with > the addition of some external level translators.
I've been wondering about that - is there a reference for the minimal spec that needs to be implemented? It might be a nice way of stripping down USB to something easier to understand. At least the FPGA shouldn't have the timing awkwardness of microcontrollers.
> I know you're talking about boards, but if you were talking about part > availability, that would be a good point. USB is used in consumer > products, and this means that the parts sometimes have short production > lives. > Those issues can apply to any part on your board though, and aren't > unique to USB. (Has anyone tried to get DDR3 RAM chips when some company > in China is manufacturing a large batch of tablets?)
BTDT, for very similar 'fun'...
> > Why isn't USB2 an FPGA programming option (in addition to JTAG)? > > Substitute the string "PCIe" for "USB2" and you have a question I asked > of the local Altera and Xilinx reps about five years ago. > > I'm still waiting for a good solution to that problem that doesn't > involve putting a "bootloader" NVM on the board to configure the FPGA > just so it can talk PCIe to get the rest of the configuration.
Likewise, I have similar bringup tedium. Do any motherboards wire up the PCIe JTAG lines in a sensible manner?
> My guess: USB2 - never. USB3 - a very remote possibility.
I'm all in favour of shooting USB2 and moving on... Theo [1] I have evil plans in the Thunderbolt department...
On 06/05/14 15:17, Allan Herriman wrote:
> On Tue, 06 May 2014 01:12:34 +0100, Theo Markettos wrote: > >> Allan Herriman <allanherriman@hotmail.com> wrote: >>> I'll second the "USB is crap" comment. >> >> It may be. > > I should clarify. I've made many boards over the years, using a variety > of interface standards. USB has never struck me as being elegant or > efficient. Its ubiquity, low cost (in volume), a robust connector and > power on the same cable as the signals seem to be its biggest plusses. > > The USB physical layer isn't too bad, IMO. Most of the issues > encountered during development are to do with the (software) drivers. > That and the reuse of VID / PID values by cheap knock-off clone gizmos > that don't quite match the functionality of the original, yet are still > expected to work. (That isn't the fault of the USB standard though.)
Drivers /can/ be a problem with USB, but they don't have to be. If you need your device to integrate with the operating system (such as happens for mice, printers, USB speakers, mass storage devices, etc.), then it is easy if you can re-use existing standardised drivers (such as the OS's own HID or MSD drivers). If you need to make your own specialised drivers, then it is a tough job on Linux - you need to learn the details of how USB works on the OS as well as the details for the USB class you are implementing, and distributing the drivers can be a challenge. On Windows, even if you understand everything and can do all the windows driver development, it is still a nightmare of signing, certification, etc. But if your device only needs to talk to programs /you/ write, or libraries/dlls/so's that /you/ write, then it is a lot easier. On Linux, libusb lets your application have direct access to the endpoints on your USB device - you have full control without any drivers in the middle. Until a few years ago, it was still hard on Windows - but someone helpfully ported libusb from Linux to Windows as WinUSB, and with the simple installer "zadig" you can avoid almost all issues with drivers on Windows too.
> > > Other posters mentioned the need to purchase an official VID / PID. The > process is too expensive for low volume or hobby projects. > > USB isn't alone there - for example my current employer owns an Ethernet > OUI (a big block of MAC addresses) as well as an Ethertype (protocol > specifier). Both of those cost money, but it's a modest once-off cost > unlike the annual charge from USB-IF.
The charge for a USB VID is one-off. The charge to use the USB logo, trademarks, etc., is annual. For a hobby project, there is no problem - pick a VID of a company you would never use, or an unassigned VID, and use that. For any professional product, the $2000 (IIRC) charge to buy a VID is annoying but if you budget it as though it were a piece of development equipment, it is not going to be an issue.
> Another thing to consider is that for (e.g.) Ethernet, there are MAC > addresses and Ethertypes that you can use for your hobby projects and > experimental protocols that won't get you into trouble. The USB-IF don't > provide VID / PID values intended for a similar purpose. (I understand > that if you buy a VID with the purpose of making it "free" they will come > after you.) > >> But look at your FPGA. How do you connect it to your PC? >> It might have ethernet or PCIe, but almost invariably what comes first >> is USB. > > It's the opposite for me. If one of my boards with an FPGA on it is > connecting to a PC, it'll be via Ethernet. > > During debugging, I might rarely use USB to connect a JTAG pod to my PC > though. > >>> If you must use USB2, I recommend using external PHY parts. >> >> This is the wrong solution > > I respectfully disagree. One thing that you might like to consider is > the I/O required for USB2. It matches well to the sort of process that > you would use for a $2 microcontroller, but not so well to the low > voltage I/O that you'd find on a 28nm FPGA. > There are also analog functions that are needed that you will not find on > an FPGA. FPGA vendors don't like including anything that doesn't have > wide applicability. > > OTOH USB3 uses serial signalling that might be a good match for FPGA > transceivers. I haven't looked closely enough at the standard to know > for sure, but I suspect there will be problems with idle or sleep (or > something like that). OTOH, FPGA transceivers now have support for the > analog signalling for SATA, so if there's enough demand in the > marketplace, anything can happen. > I only put a USB3 controller into a product once - a (then new) NEC / > Renesas part that connected to my system using PCIe, so I can't claim to > be a USB3 expert. > > I'm also aware that low speed (1.5Mb/s) USB can be bit-bashed in software > on a cheap microcontroller. I don't think it would be compliant with the > spec but it does seem to work and is extremely cheap.
Bit-banging low speed USB should be perfectly compliant with the specs (if it is done right, of course). On an FPGA there should be no problem implementing 12 Mb/s USB directly, or 480 Mb/s using an external PHY (the XMOS devices do that, with the 480 Mb/s USB device running in software). The USB protocol is not /that/ complicated.
> That really sounds like it could easily fit into an FPGA, possibly with > the addition of some external level translators. > >> because those [PHY] chips are never there when you >> need them. > > I know you're talking about boards, but if you were talking about part > availability, that would be a good point. USB is used in consumer > products, and this means that the parts sometimes have short production > lives. > Some years ago I designed a USB2 hub from ST-Ericcson into a product. > They had been made obsolete before our second production run. Now > there's an SMSC one in its place. Since then, SMSC has been bought by > Microchip and who knows what's going to happen. > > Those issues can apply to any part on your board though, and aren't > unique to USB. (Has anyone tried to get DDR3 RAM chips when some company > in China is manufacturing a large batch of tablets?) > >> If you're doing your own board you can put on one, but many >> dev boards don't have them. > > I don't use dev boards, so I really shouldn't comment. > >> Why isn't USB2 an FPGA programming option (in addition to JTAG)? > > Substitute the string "PCIe" for "USB2" and you have a question I asked > of the local Altera and Xilinx reps about five years ago. > > I'm still waiting for a good solution to that problem that doesn't > involve putting a "bootloader" NVM on the board to configure the FPGA > just so it can talk PCIe to get the rest of the configuration. > > My guess: USB2 - never. USB3 - a very remote possibility. > > Regards, > Allan >
On Wednesday, May 7, 2014 2:38:26 AM UTC+3, Theo Markettos wrote:
> Allan Herriman <allanherriman@hotmail.com> wrote: > > > > > > I respectfully disagree. One thing that you might like to consider is > > the I/O required for USB2. It matches well to the sort of process that > > you would use for a $2 microcontroller, but not so well to the low > > voltage I/O that you'd find on a 28nm FPGA. > > That sounds plausible. Except every phone SoC has a USB OTG port - and some > of those are 28nm and not exactly low performance. >
I'd guess that at least some of 28nm SOCs require external level-shifter. Actually I'd expect it to be true starting from 65nm. Unfortunately, it's damn hard to get detailed datasheets for SOCs from Quallcomm, Mediatek, Apple or Samsung. But we can take a look at USB controllers of Xilinx Zync, Altera Cyclon-V SE/SX/ST, Freescale i.MX 6 series and QorIQ and TI OMAP4 and OMAP5. They use virtually the same technology, but not as secretive as high-volume folks. Both Altera and Xilinx export UTMI+ ULPI interface and need external PHY. Both Freescale families implement PHY on chip. TI OMAP4 needs external PHY. TI OMAP5 implements both interface to external phy and on-chip USB 2/3 PHY. On chip PPY has few limitations, but they are probably irrelevant in your use case.
On Tuesday, May 6, 2014 8:24:45 AM UTC-7, KJ wrote:
> On Tuesday, May 6, 2014 9:17:25 AM UTC-4, Allan Herriman wrote: >=20 > > USB isn't alone there - for example my current employer owns an Etherne=
t=20
>=20 > > OUI (a big block of MAC addresses) as well as an Ethertype (protocol=20 >=20 > > specifier). Both of those cost money, but it's a modest once-off cost=
=20
>=20 > > unlike the annual charge from USB-IF. >=20 > >=20 >=20 >=20 >=20 > The annual charge is not mandatory, it is only to allow you to license us=
e of their logos on new products. You can simply pay the first year (which= gets you your VID) and never pay again. If having the USB logo is importa= nt to your product marketing, then you do have to pay for that privilege. = Bottom line is that the first year $$ gets you the VID (and the use of logo= s if you choose); subsequent year's $$ allows you to continue to use logos.
>=20
If you don't care about logos, you can always license a subset of=20 VID 16D0 from MCS Electronics for around 10 Euros each. They bought their = VID before the USB-IF cracked down on resellers. =20 http://www.mcselec.com/index.php?page=3Dshop.product_details&flypage=3Dshop= .flypage&product_id=3D92&option=3Dcom_phpshop&Itemid=3D1 I'm not sure if this would keep you from getting WHQL certified or not, and= I'd assume it would rule out your ability to use the official USB logo. B= ut for many/most products, nobody gives much of a hoot about either of thes= e. -- john, KE5FX (no relationship with MCS other than as a satisfied customer= )
Den tirsdag den 6. maj 2014 15.17.25 UTC+2 skrev Allan Herriman:
> On Tue, 06 May 2014 01:12:34 +0100, Theo Markettos wrote: > > > > > Allan Herriman <allanherriman@hotmail.com> wrote: > > >> I'll second the "USB is crap" comment. > > > > > > It may be. > > > > I should clarify. I've made many boards over the years, using a variety > > of interface standards. USB has never struck me as being elegant or > > efficient. Its ubiquity, low cost (in volume), a robust connector and > > power on the same cable as the signals seem to be its biggest plusses. > > > > The USB physical layer isn't too bad, IMO. Most of the issues > > encountered during development are to do with the (software) drivers. > > That and the reuse of VID / PID values by cheap knock-off clone gizmos > > that don't quite match the functionality of the original, yet are still > > expected to work. (That isn't the fault of the USB standard though.) > > > > > > Other posters mentioned the need to purchase an official VID / PID. The > > process is too expensive for low volume or hobby projects. > > > > USB isn't alone there - for example my current employer owns an Ethernet > > OUI (a big block of MAC addresses) as well as an Ethertype (protocol > > specifier). Both of those cost money, but it's a modest once-off cost > > unlike the annual charge from USB-IF. > > Another thing to consider is that for (e.g.) Ethernet, there are MAC > > addresses and Ethertypes that you can use for your hobby projects and > > experimental protocols that won't get you into trouble. The USB-IF don't > > provide VID / PID values intended for a similar purpose. (I understand > > that if you buy a VID with the purpose of making it "free" they will come > > after you.) > > > > > But look at your FPGA. How do you connect it to your PC? > > > It might have ethernet or PCIe, but almost invariably what comes first > > > is USB. > > > > It's the opposite for me. If one of my boards with an FPGA on it is > > connecting to a PC, it'll be via Ethernet. > > > > During debugging, I might rarely use USB to connect a JTAG pod to my PC > > though. > > > > >> If you must use USB2, I recommend using external PHY parts. > > > > > > This is the wrong solution > > > > I respectfully disagree. One thing that you might like to consider is > > the I/O required for USB2. It matches well to the sort of process that > > you would use for a $2 microcontroller, but not so well to the low > > voltage I/O that you'd find on a 28nm FPGA. > > There are also analog functions that are needed that you will not find on > > an FPGA. FPGA vendors don't like including anything that doesn't have > > wide applicability. > > > > OTOH USB3 uses serial signalling that might be a good match for FPGA > > transceivers. I haven't looked closely enough at the standard to know > > for sure, but I suspect there will be problems with idle or sleep (or > > something like that). OTOH, FPGA transceivers now have support for the > > analog signalling for SATA, so if there's enough demand in the > > marketplace, anything can happen. > > I only put a USB3 controller into a product once - a (then new) NEC / > > Renesas part that connected to my system using PCIe, so I can't claim to > > be a USB3 expert. > > > > I'm also aware that low speed (1.5Mb/s) USB can be bit-bashed in software > > on a cheap microcontroller. I don't think it would be compliant with the > > spec but it does seem to work and is extremely cheap. > > That really sounds like it could easily fit into an FPGA, possibly with > > the addition of some external level translators. >
I tried the opencores 12Mbit USB years ago, it was easy enough to get running The design was intended to use a phy but I just used a bit of logic an a differential input in parallel with two tristate outputs, it is all 3.3V Doesn't even the latest and greatest FPGAs have some IOs capable of 3.3V? 480Mbit would be harder, doubt you just do 4x sampling to recover clock like you can with 12Mbit
> > > because those [PHY] chips are never there when you > > > need them. > > > > I know you're talking about boards, but if you were talking about part > > availability, that would be a good point. USB is used in consumer > > products, and this means that the parts sometimes have short production > > lives. > > Some years ago I designed a USB2 hub from ST-Ericcson into a product. > > They had been made obsolete before our second production run. Now > > there's an SMSC one in its place. Since then, SMSC has been bought by > > Microchip and who knows what's going to happen. > > > > Those issues can apply to any part on your board though, and aren't > > unique to USB. (Has anyone tried to get DDR3 RAM chips when some company > > in China is manufacturing a large batch of tablets?) > > > > > If you're doing your own board you can put on one, but many > > > dev boards don't have them. > > > > I don't use dev boards, so I really shouldn't comment. > > > > > Why isn't USB2 an FPGA programming option (in addition to JTAG)? > > > > Substitute the string "PCIe" for "USB2" and you have a question I asked > > of the local Altera and Xilinx reps about five years ago. > > > > I'm still waiting for a good solution to that problem that doesn't > > involve putting a "bootloader" NVM on the board to configure the FPGA > > just so it can talk PCIe to get the rest of the configuration. > > > > My guess: USB2 - never. USB3 - a very remote possibility. > > > > Regards, > > Allan
-Lasse
On Sun, 04 May 2014 12:50:28 -0700, Brane2 wrote:

> Dne nedelja, 04. maj 2014 15:02:44 UTC je oseba Theo Markettos napisala: > > <SNIP> > >> But there's an elephant in this room: why is USB on FPGA so hard? > > First, USB is crap. > > Second, you need license from USB consortium in order to get you > manufacturer ID code spans etc. And IIRC it was on the order of EURO > 4-5K > > If your inteface was a hard macro or built into a microcontroller, you > might be able to get an ID or two free of charge from the producer of > the chip, but without it you have to plunge the dough by yourself if you > want to sell the thing as USB compatible. > > Ethernet MAC span is both cheaper and less neccessary.
If the customer wants USB, then USB is the right way to go. -- Tim Wescott Control system and signal processing consulting www.wescottdesign.com