TITLE Implementation of CCSDS based Telemetry Encoder on FPGA OBJECTIVES Design and development of CCSDS based Telemetry Encoder on FPGA using VHDL, for satellite applications. OUTLINE The project will comprise of three phases. First phase will be the know how development of CCSDS Packet TM encoding Standard. The second phase will be the implementation of all layers of standard on FPGA using the VHDL language. Each layer will be implemented as a separate module and simulation will be performed. Finally all the modules will be integrated as a system in the third phase of the project. Complete working TM Encoder will be demonstrated on FPGA kit. MAJOR EQUIPMENT & SOFTWARE REQUIRED Hardware: FPGA kit (Spartan-3 or Virtex) Software: Xilinx ISE
need coding
Started by ●May 11, 2014
Reply by ●May 11, 20142014-05-11
Le 11/05/2014 16:58, Saqib Saqi a �crit :> TITLE > Implementation of CCSDS based Telemetry Encoder on FPGA > OBJECTIVES > Design and development of CCSDS based Telemetry Encoder on FPGA using VHDL, for satellite applications. > OUTLINE > The project will comprise of three phases. > First phase will be the know how development of CCSDS Packet TM encoding Standard. > The second phase will be the implementation of all layers of standard on FPGA using the VHDL language. Each layer will be implemented as a separate module and simulation will be performed. > Finally all the modules will be integrated as a system in the third phase of the project. Complete working TM Encoder will be demonstrated on FPGA kit. > MAJOR EQUIPMENT & SOFTWARE REQUIRED > > Hardware: FPGA kit (Spartan-3 or Virtex) > Software: Xilinx ISE >Yes, it definitely looks like you need to start coding. Nicolas
Reply by ●May 12, 20142014-05-12
W dniu 2014-05-11 16:58, Saqib Saqi pisze:> TITLE > Implementation of CCSDS based Telemetry Encoder on FPGA > OBJECTIVES > Design and development of CCSDS based Telemetry Encoder on FPGA using VHDL, for satellite applications. > OUTLINE > The project will comprise of three phases. > First phase will be the know how development of CCSDS Packet TM encoding Standard. > The second phase will be the implementation of all layers of standard on FPGA using the VHDL language. Each layer will be implemented as a separate module and simulation will be performed. > Finally all the modules will be integrated as a system in the third phase of the project. Complete working TM Encoder will be demonstrated on FPGA kit. > MAJOR EQUIPMENT & SOFTWARE REQUIRED > > Hardware: FPGA kit (Spartan-3 or Virtex) > Software: Xilinx ISE >Interesting project. I could join in if you can pay .... BR Adam
Reply by ●May 12, 20142014-05-12
On Monday, May 12, 2014 2:03:30 PM UTC+5, Adam G=F3rski wrote:> W dniu 2014-05-11 16:58, Saqib Saqi pisze: >=20 > > TITLE >=20 > > Implementation of CCSDS based Telemetry Encoder on FPGA >=20 > > OBJECTIVES >=20 > > Design and development of CCSDS based Telemetry Encoder on FPGA using V=HDL, for satellite applications.>=20 > > OUTLINE >=20 > > The project will comprise of three phases. >=20 > > First phase will be the know how development of CCSDS Packet TM encod=ing Standard.>=20 > > The second phase will be the implementation of all layers of standard o=n FPGA using the VHDL language. Each layer will be implemented as a separat= e module and simulation will be performed.>=20 > > Finally all the modules will be integrated as a system in the third pha=se of the project. Complete working TM Encoder will be demonstrated on FPGA= kit.>=20 > > MAJOR EQUIPMENT & SOFTWARE REQUIRED >=20 > > >=20 > > Hardware: FPGA kit (Spartan-3 or Virtex) >=20 > > Software: Xilinx ISE >=20 > > >=20 >=20 >=20 > Interesting project. I could join in if you can pay .... >=20 >=20 >=20 > BR >=20 >=20 >=20 > Adamyes i can u can email me muhammadsaqib10cs52@hotmail.com or FB account on Search type=20 saqi0313saqi@yahoo.com you can add me=20 i'm w8ing for ur resposnse
Reply by ●May 12, 20142014-05-12
On Monday, May 12, 2014 12:52:58 AM UTC+5, Nicolas Matringe wrote:> Le 11/05/2014 16:58, Saqib Saqi a =EF=BF=BDcrit : >=20 > > TITLE >=20 > > Implementation of CCSDS based Telemetry Encoder on FPGA >=20 > > OBJECTIVES >=20 > > Design and development of CCSDS based Telemetry Encoder on FPGA using V=HDL, for satellite applications.>=20 > > OUTLINE >=20 > > The project will comprise of three phases. >=20 > > First phase will be the know how development of CCSDS Packet TM encod=ing Standard.>=20 > > The second phase will be the implementation of all layers of standard o=n FPGA using the VHDL language. Each layer will be implemented as a separat= e module and simulation will be performed.>=20 > > Finally all the modules will be integrated as a system in the third pha=se of the project. Complete working TM Encoder will be demonstrated on FPGA= kit.>=20 > > MAJOR EQUIPMENT & SOFTWARE REQUIRED >=20 > > >=20 > > Hardware: FPGA kit (Spartan-3 or Virtex) >=20 > > Software: Xilinx ISE >=20 > > >=20 >=20 >=20 > Yes, it definitely looks like you need to start coding. >=20 >=20 >=20 > Nicolaskindly help me in packet telemetry encoder ...i need to encode all the enc= oder or just telemetry encoder ...help me if u can
Reply by ●May 12, 20142014-05-12
On Sun, 11 May 2014 07:58:17 -0700, Saqib Saqi wrote:> TITLE Implementation of CCSDS based Telemetry Encoder on FPGA OBJECTIVES > Design and development of CCSDS based Telemetry Encoder on FPGA using > VHDL, for satellite applications. > OUTLINE > The project will comprise of three phases. > First phase will be the know how development of CCSDS Packet TM > encoding Standard. > The second phase will be the implementation of all layers of standard on > FPGA using the VHDL language. Each layer will be implemented as a > separate module and simulation will be performed. > Finally all the modules will be integrated as a system in the third > phase of the project. Complete working TM Encoder will be demonstrated > on FPGA kit. > MAJOR EQUIPMENT & SOFTWARE REQUIRED > > Hardware: FPGA kit (Spartan-3 or Virtex) > Software: Xilinx ISEUniversity final project? -- Tim Wescott Wescott Design Services http://www.wescottdesign.com
Reply by ●May 12, 20142014-05-12
On Mon, 12 May 2014 11:03:30 +0200, Adam Górski wrote:> W dniu 2014-05-11 16:58, Saqib Saqi pisze: >> TITLE >> Implementation of CCSDS based Telemetry Encoder on FPGA OBJECTIVES >> Design and development of CCSDS based Telemetry Encoder on FPGA using >> VHDL, for satellite applications. >> OUTLINE >> The project will comprise of three phases. >> First phase will be the know how development of CCSDS Packet TM >> encoding Standard. >> The second phase will be the implementation of all layers of standard >> on FPGA using the VHDL language. Each layer will be implemented as a >> separate module and simulation will be performed. >> Finally all the modules will be integrated as a system in the third >> phase of the project. Complete working TM Encoder will be demonstrated >> on FPGA kit. >> MAJOR EQUIPMENT & SOFTWARE REQUIRED >> >> Hardware: FPGA kit (Spartan-3 or Virtex) >> Software: Xilinx ISE >> >> > Interesting project. I could join in if you can pay .... > > BR > > AdamIf he's offering to pay you to do his senior project, consider that you'll be helping to graduate one more incompetent manager. Wouldn't you rather he was one department over, in sales or something? -- Tim Wescott Wescott Design Services http://www.wescottdesign.com
Reply by ●May 13, 20142014-05-13
W dniu 2014-05-12 23:26, Tim Wescott pisze:> On Mon, 12 May 2014 11:03:30 +0200, Adam Górski wrote: > >> W dniu 2014-05-11 16:58, Saqib Saqi pisze: >>> TITLE >>> Implementation of CCSDS based Telemetry Encoder on FPGA OBJECTIVES >>> Design and development of CCSDS based Telemetry Encoder on FPGA using >>> VHDL, for satellite applications. >>> OUTLINE >>> The project will comprise of three phases. >>> First phase will be the know how development of CCSDS Packet TM >>> encoding Standard. >>> The second phase will be the implementation of all layers of standard >>> on FPGA using the VHDL language. Each layer will be implemented as a >>> separate module and simulation will be performed. >>> Finally all the modules will be integrated as a system in the third >>> phase of the project. Complete working TM Encoder will be demonstrated >>> on FPGA kit. >>> MAJOR EQUIPMENT & SOFTWARE REQUIRED >>> >>> Hardware: FPGA kit (Spartan-3 or Virtex) >>> Software: Xilinx ISE >>> >>> >> Interesting project. I could join in if you can pay .... >> >> BR >> >> Adam > > If he's offering to pay you to do his senior project, consider that > you'll be helping to graduate one more incompetent manager. > > Wouldn't you rather he was one department over, in sales or something? >If this is any kind of school project - I'm not interested ( no way). I'm not going to take it for 100$. My time is much more expensive. If this is space application for serius client ( like NASA or something ) and is interesting , "beam me up Scotty". BR Adam
Reply by ●May 13, 20142014-05-13
On 13/05/2014 09:47, Adam Górski wrote:> W dniu 2014-05-12 23:26, Tim Wescott pisze: >> On Mon, 12 May 2014 11:03:30 +0200, Adam Górski wrote: >> >>> W dniu 2014-05-11 16:58, Saqib Saqi pisze: >>>> TITLE >>>> Implementation of CCSDS based Telemetry Encoder on FPGA OBJECTIVES >>>> Design and development of CCSDS based Telemetry Encoder on FPGA using >>>> VHDL, for satellite applications. >>>> OUTLINE >>>> The project will comprise of three phases. >>>> First phase will be the know how development of CCSDS Packet TM >>>> encoding Standard. >>>> The second phase will be the implementation of all layers of standard >>>> on FPGA using the VHDL language. Each layer will be implemented as a >>>> separate module and simulation will be performed. >>>> Finally all the modules will be integrated as a system in the third >>>> phase of the project. Complete working TM Encoder will be demonstrated >>>> on FPGA kit. >>>> MAJOR EQUIPMENT & SOFTWARE REQUIRED >>>> >>>> Hardware: FPGA kit (Spartan-3 or Virtex) >>>> Software: Xilinx ISE >>>> >>>> >>> Interesting project. I could join in if you can pay .... >>> >>> BR >>> >>> Adam >> >> If he's offering to pay you to do his senior project, consider that >> you'll be helping to graduate one more incompetent manager. >> >> Wouldn't you rather he was one department over, in sales or something? >> > > If this is any kind of school project - I'm not interested ( no way). > I'm not going to take it for 100$. My time is much more expensive. > If this is space application for serius client ( like NASA or something > ) and is interesting , "beam me up Scotty". >I am pretty sure Nasa already has in-house CCSDS cores, for any other smaller space company I believe they can get the ESA CCSDS VHDL design (for free?) under a license agreement. I also believe (but haven't checked as I no longer work in the space industry) that you can get most CCSDS modules (turbo codecs excluded?) from Gaisler research. Hans www.ht-lab.com> > BR > > Adam
Reply by ●May 13, 20142014-05-13
W dniu 2014-05-13 11:26, HT-Lab pisze:> On 13/05/2014 09:47, Adam Górski wrote: >> W dniu 2014-05-12 23:26, Tim Wescott pisze: >>> On Mon, 12 May 2014 11:03:30 +0200, Adam Górski wrote: >>> >>>> W dniu 2014-05-11 16:58, Saqib Saqi pisze: >>>>> TITLE >>>>> Implementation of CCSDS based Telemetry Encoder on FPGA OBJECTIVES >>>>> Design and development of CCSDS based Telemetry Encoder on FPGA using >>>>> VHDL, for satellite applications. >>>>> OUTLINE >>>>> The project will comprise of three phases. >>>>> First phase will be the know how development of CCSDS Packet TM >>>>> encoding Standard. >>>>> The second phase will be the implementation of all layers of standard >>>>> on FPGA using the VHDL language. Each layer will be implemented as a >>>>> separate module and simulation will be performed. >>>>> Finally all the modules will be integrated as a system in the third >>>>> phase of the project. Complete working TM Encoder will be demonstrated >>>>> on FPGA kit. >>>>> MAJOR EQUIPMENT & SOFTWARE REQUIRED >>>>> >>>>> Hardware: FPGA kit (Spartan-3 or Virtex) >>>>> Software: Xilinx ISE >>>>> >>>>> >>>> Interesting project. I could join in if you can pay .... >>>> >>>> BR >>>> >>>> Adam >>> >>> If he's offering to pay you to do his senior project, consider that >>> you'll be helping to graduate one more incompetent manager. >>> >>> Wouldn't you rather he was one department over, in sales or something? >>> >> >> If this is any kind of school project - I'm not interested ( no way). >> I'm not going to take it for 100$. My time is much more expensive. >> If this is space application for serius client ( like NASA or something >> ) and is interesting , "beam me up Scotty". >> > I am pretty sure Nasa already has in-house CCSDS cores, for any other > smaller space company I believe they can get the ESA CCSDS VHDL design > (for free?) under a license agreement. > > I also believe (but haven't checked as I no longer work in the space > industry) that you can get most CCSDS modules (turbo codecs excluded?) > from Gaisler research.I'm sure it is true :) Adam
