Downloading program to Nios

Dear all,

I am trying to download hello_nios.srec to nios, using the sdk by
typing the following command:

nr hello_nios.srec 

I am following the software tutorials provided by altera. for some
reason, it is not working, it gives:

[SOPC Builder]$ nr hello_nios.srec

nios-run: Ready to download hello_nios.srec

nios-run: Downloading......................
...........................................
...........................................

nios-run: Terminal mode (Control-C exits)
-----------------------------------------

and it stops here, and the program always not downloaded...

anyone has an idea what could be the problem...???

regards,
john

Before downloading the srec, make sure that you have programmed the FPGA
device on the board using the programming file generated by Quartus.

Hope this helps.

- Subroto Datta
Altera Corp.

"Subroto Datta" <sdatta@altera.com> wrote in message news:<D87Pc.3805$tF3.2388@newssvr32.news.prodigy.com>...
> Before downloading the srec, make sure that you have programmed the FPGA
> device on the board using the programming file generated by Quartus.
> 
> Hope this helps.
> 
> - Subroto Datta
> Altera Corp.

Dear Subroto,

Do u mean the .sof file?

if you meant the .sof file, yes I did download it to the stratix chip
before running the .srec!

Thank you,
john

Before downloading type in:

nr -t


Enter a view times to see if NIOS dumps memory. If nothing happens check you
port/cable. Make sure the pins are correctly connected to the Rx and TX via
your FPGA.

Did you successfully downloaded a program before?


Looking at your 1st post it seems that if was actually downloading. If it
downloads and then stops/terminates then your program is crashing. Are you
compiling standard examples on the dev. board or have you modified your
hello_nios.c or running on your own board? One of the main problems I have
found was a dry joint/ missing pin on one of the addr/data lines. The
program downloads , but the memory is only receiving garbage. After
completion the Go command sends it to the execution point where it basically
runs random code. To verify this make sure you can do the 'nr -t' thing. If
you can then check your target memory e.g. 0x1000000  with "m1000000". If it
dumps memory then try and change it e.g. "m1000000:1234". Recheck the memory
with "m1000000" to verify that the memory is writeable and that the correct
data is stored. Also make sure that the next memory word is not altered
(very common).

Good luck

Victor

"John" <johngalil@hotmail.com> wrote in message
news:46532e21.0408011924.5693e366@posting.google.com...
> "Subroto Datta" <sdatta@altera.com> wrote in message
news:<D87Pc.3805$tF3.2388@newssvr32.news.prodigy.com>...
> > Before downloading the srec, make sure that you have programmed the FPGA
> > device on the board using the programming file generated by Quartus.
> >
> > Hope this helps.
> >
> > - Subroto Datta
> > Altera Corp.
>
> Dear Subroto,
>
> Do u mean the .sof file?
>
> if you meant the .sof file, yes I did download it to the stratix chip
> before running the .srec!
>
> Thank you,
> john

thx Victor, it is working now.

Best regards,
John

"Victor Schutte" <victors@mweb.co.za> wrote in message news:<cel9fb$e5u$1@ctb-nnrp2.saix.net>...
> Before downloading type in:
> 
> nr -t
> 
> 
> Enter a view times to see if NIOS dumps memory. If nothing happens check you
> port/cable. Make sure the pins are correctly connected to the Rx and TX via
> your FPGA.
> 
> Did you successfully downloaded a program before?
> 
> 
> Looking at your 1st post it seems that if was actually downloading. If it
> downloads and then stops/terminates then your program is crashing. Are you
> compiling standard examples on the dev. board or have you modified your
> hello_nios.c or running on your own board? One of the main problems I have
> found was a dry joint/ missing pin on one of the addr/data lines. The
> program downloads , but the memory is only receiving garbage. After
> completion the Go command sends it to the execution point where it basically
> runs random code. To verify this make sure you can do the 'nr -t' thing. If
> you can then check your target memory e.g. 0x1000000  with "m1000000". If it
> dumps memory then try and change it e.g. "m1000000:1234". Recheck the memory
> with "m1000000" to verify that the memory is writeable and that the correct
> data is stored. Also make sure that the next memory word is not altered
> (very common).
> 
> Good luck
> 
> Victor
> 
> "John" <johngalil@hotmail.com> wrote in message
> news:46532e21.0408011924.5693e366@posting.google.com...
> > "Subroto Datta" <sdatta@altera.com> wrote in message
>  news:<D87Pc.3805$tF3.2388@newssvr32.news.prodigy.com>...
> > > Before downloading the srec, make sure that you have programmed the FPGA
> > > device on the board using the programming file generated by Quartus.
> > >
> > > Hope this helps.
> > >
> > > - Subroto Datta
> > > Altera Corp.
> >
> > Dear Subroto,
> >
> > Do u mean the .sof file?
> >
> > if you meant the .sof file, yes I did download it to the stratix chip
> > before running the .srec!
> >
> > Thank you,
> > john