Hi, I read LogiCORE IP AXI Ethernet Lite MAC (v1.01.b), which says that the Ethernet interface is with 10Mb/s 100Mb/s. On its spec, I find that the maximum clock for Spartan xc6slx45t AXI4-lite 120 MHz (Target Fmax). I am puzzled about the two categories numbers. 120 MHz is only marginal higher than 100 Mb/s. How can it recover a 100 Mb/s data? Could you explain it to me? Thanks,
How can Spartan-6 interface with 10/100 Mb/s Ethernet?
Started by ●August 5, 2014
Reply by ●August 5, 20142014-08-05
Consider what happens when you go from a serial interface (like in Ethernet= ) to a parallel interface. If you have a 1 bit wide interface at 100 Mb/s = interfacing to a 16 bit wide parallel interface, your parallel interface on= ly needs to run at 6.25 Mb/s (100/16). As long as the module that does the= serial to parallel conversion can keep up, the rest of the logic can run i= n parallel and can be run much slower. On Tuesday, August 5, 2014 8:49:47 AM UTC-4, fl wrote:> Hi, >=20 > I read LogiCORE IP AXI Ethernet Lite MAC (v1.01.b), which says that the E=thernet=20>=20 > interface is with 10Mb/s 100Mb/s. On its spec, I find that the maximum cl=ock for>=20 > Spartan xc6slx45t AXI4-lite 120 MHz (Target Fmax). I am puzzled about the=two>=20 > categories numbers. 120 MHz is only marginal higher than 100 Mb/s. How ca=n it=20>=20 > recover a 100 Mb/s data? >=20 > Could you explain it to me? Thanks,
Reply by ●August 5, 20142014-08-05
fl wrote:> Hi, > I read LogiCORE IP AXI Ethernet Lite MAC (v1.01.b), which says that the Ethernet > interface is with 10Mb/s 100Mb/s. On its spec, I find that the maximum clock for > Spartan xc6slx45t AXI4-lite 120 MHz (Target Fmax). I am puzzled about the two > categories numbers. 120 MHz is only marginal higher than 100 Mb/s. How can it > recover a 100 Mb/s data? > Could you explain it to me? Thanks,The PHY interface (MII) runs at 25 MHz for a 100 Mbps link. The AXI bus is much wider than even that interface, so it can easily deal with 1Gpbs Ethernet. Note that the 120 MHz limit is at the AXI interface and not the I/O side of the module. -- Gabor