XILINX PCIe read of slow device

On Tuesday, March 9, 2021 at 10:56:20 AM UTC-8, David Brown wrote:
> On 09/03/2021 03:52, Luis Benites wrote: 
> > On Monday, October 27, 2014 at 11:05:32 AM UTC-7, david....@gmail.com 
> > wrote: 
> >> What is the correct way to handle a PCIE request to a slow device? 
> >> 
> >> 
> >> I have a xilinx spartan 6 PCIe using Integrated Block for PCI 
> >> Express. 
> >> 
> >> The BAR memory map is decoded and some addresses map to fast ram, 
> >> or local registers and these work OK, but some addresses map to 
> >> slow devices.. like I2C or internal processes that need a few 
> >> cycles to process before they can produce valid data to be returned 
> >> to the PCI bus. 
> >> 
> >> Is there a way to tell the PCI bus to wait, or retry..? 
> >> 
> >> thanks 
> > 
> > Just in case this is what you are trying to so: stalling your whole 
> > system and all other PCIe accesses to wait for an i2c read should 
> > never be the solution to anything. You send your completion whenever 
> > it's ready. If it takes you longer than the spec to complete then you 
> > need to initiate the read in some other way (earlier), check for 
> > ready and only then issue the read you can complete on time. 
> >
> Please look at the date of the post you are replying to. Do you think 
> someone will have been waiting over six years for an answer to a Usenet 
> post? It's nice that you are trying to help, of course.

Ha ha. Let's start a flame war over trying to help. Don't you have better use of your time? Anyone looking for CURRECT PCIe help with a google search will come across this post and get something from it. Nothing that was said is outdated.