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Using FPGA to feed 80386

Started by Rick C. Hodgin ●December 11, 2014
Summary This thread explores the feasibility of using an FPGA to interface with a legacy Intel 80386 processor, potentially acting as a memory controller or co-processor.

This thread explores the feasibility of using an FPGA to interface with a legacy Intel 80386 processor, potentially acting as a memory controller or co-processor. The discussion primarily focuses on the technical challenges of bridging vintage 5V hardware with modern low-voltage FPGA technology.

While participants conclude that such a project is possible as a hobbyist exercise, it requires significant attention to logic level translation and board design. For practical applications, experts recommend modern alternatives like the Xilinx Zynq platform, which offers integrated ARM cores and FPGA fabric.

  • Interfacing a 5V 80386 with a 3.3V FPGA requires active level shifters or voltage translators to prevent hardware damage.
  • Modern FPGA development boards provide 5V as a power rail, but their I/O pins are typically not 5V tolerant.
  • The 80387 math co-processor interface is suggested as a potential model for implementing a custom FPGA-based co-processor.
  • Participants recommend the Xilinx Zynq (SoC) as a superior alternative for those needing tight integration between a CPU and programmable logic.
Logic Level TranslationIntel 80386Intel QuartusSystem-on-Chip (SoC)
Would it be possible to connect an FPGA up to
an 80386 (or other) CPU, to respond to memory
and port requests, and leverage it as a resource?

I'm thinking software runs on the 80386, given
it by the FPGA, instructing it as a type of co-
processor, which does things on command.

I see voltage differences as an issue.

Best regards,
Rick C. Hodgin
Reply by Antti ●December 11, 20142014-12-11
On Thursday, 11 December 2014 20:55:20 UTC+1, Rick C. Hodgin  wrote:

> Would it be possible to connect an FPGA up to
> an 80386 (or other) CPU, to respond to memory
> and port requests, and leverage it as a resource?
> 
> I'm thinking software runs on the 80386, given
> it by the FPGA, instructing it as a type of co-
> processor, which does things on command.
> 
> I see voltage differences as an issue.
> 
> Best regards,
> Rick C. Hodgin


http://igg.me/at/zynq
:) get one

I did build many of my work stations myself, 8088 based, 80386 was advanced stuff. 

All is doable, question is what makes sense and what is fun.

Hacking bare metal Zynq is FUN!
Reply by Rick C. Hodgin ●December 11, 20142014-12-11
How would I handle the disparate voltages? Are
there rail devices which support N pins in at V1,
which then support V2 out the other side? So I
would wire 80386 to rail-1, and rail-2 to FPGA?

Best regards,
Rick C. Hodgin
Reply by Rick C. Hodgin ●December 11, 20142014-12-11
Antti wrote:

> I did build many of my work stations myself,
> 8088 based...


Nice.

Best regards,
Rick C. Hodgin
Reply by Stef ●December 11, 20142014-12-11
On 2014-12-11 Antti wrote in comp.arch.fpga:

>
> http://igg.me/at/zynq
>:) get one
>
> I did build many of my work stations myself, 8088 based, 80386 was advanced stuff. 
>
> All is doable, question is what makes sense and what is fun.
>
> Hacking bare metal Zynq is FUN!


It indeed is! I started not too long ago on the zynq, using the Avnet
MicroZed. Now have a daul core bare metal app running. I found this blog
very helpful:
http://forums.xilinx.com/t5/Xcell-Daily-Blog/Adam-Taylor-s-MicroZed-Chronicles-Part-61-PicoBlaze-Part-Six/ba-p/551888
(scroll to the bottom of the page for an index of all articles, starting
at the very first steps.

Even if you are not using the MicroZed I think most of it is very useful
for getting familiar with the zynq.

-- 
Stef    (remove caps, dashes and .invalid from e-mail address to reply by mail)

mathematician, n.:
	Some one who believes imaginary things appear right before your _i's.
Reply by HT-Lab ●December 11, 20142014-12-11
On 11/12/2014 19:55, Rick C. Hodgin wrote:
Hi Rick,

> Would it be possible to connect an FPGA up to
> an 80386 (or other) CPU, to respond to memory
> and port requests, and leverage it as a resource?


Sure, look at the 387 interface. The 386 does all the hard work of 
decoding the effective address and when the data is ready the 387 grabs 
it.


>
> I'm thinking software runs on the 80386, given
> it by the FPGA, instructing it as a type of co-
> processor, which does things on command.
>
> I see voltage differences as an issue.


Have a look at Enterpoint's Craignell module schematics:

http://www.enterpoint.co.uk/component_replacements/craignell.html

Regards,
Hans.
www.ht-lab.com




>
> Best regards,
> Rick C. Hodgin
>
Reply by hamilton ●December 11, 20142014-12-11
On 12/11/2014 1:24 PM, Rick C. Hodgin wrote:

> How would I handle the disparate voltages?


What does this mean ??
Reply by Rick C. Hodgin ●December 11, 20142014-12-11
hamilton wrote:

> On 12/11/2014 1:24 PM, Rick C. Hodgin wrote:
> >How would I handle the disparate voltages?
>
> What does this mean ??


The 80386 uses 5V. I was thinking the Altera
Cyclone V GX Starter Kit only supported up to
3.3V. But I see now it supports 5V on GPIO pins.

Best regards,
Rick C. Hodgin
Reply by Tim Wescott ●December 11, 20142014-12-11
On Thu, 11 Dec 2014 12:24:15 -0800, Rick C. Hodgin wrote:


> How would I handle the disparate voltages? Are there rail devices which
> support N pins in at V1,
> which then support V2 out the other side? So I would wire 80386 to
> rail-1, and rail-2 to FPGA?
> 
> Best regards,
> Rick C. Hodgin


You want a level shifter or translator:

<http://www.digikey.com/product-search/en/integrated-circuits-ics/logic-
translators/2556437>

-- 

Tim Wescott
Wescott Design Services
http://www.wescottdesign.com
Reply by Tim Wescott ●December 11, 20142014-12-11
On Thu, 11 Dec 2014 14:03:14 -0800, Rick C. Hodgin wrote:


> hamilton wrote:
>> On 12/11/2014 1:24 PM, Rick C. Hodgin wrote:
>> >How would I handle the disparate voltages?
>>
>> What does this mean ??
> 
> The 80386 uses 5V. I was thinking the Altera Cyclone V GX Starter Kit
> only supported up to 3.3V. But I see now it supports 5V on GPIO pins.


"Support" as in it will let you power a GPIO block from 5V?  Or does it 
just mean that a 3.3V GPIO pin is 5V tolerant?

If the latter, then you need to make sure that the '386 has TTL-level 
inputs (V_HI < 3V or so).

-- 

Tim Wescott
Wescott Design Services
http://www.wescottdesign.com