Synplify Identify with Microsemi FPGAs

Started by ees3dc February 15, 2016
Is anybody out there using Microsemi's Libero SoC and the bundled Synplfiy

Identify is giving me problems:

1. It will not accept a depth of  greater than 128 even when I ask for it
2. Gives completely wrong and impossible waveform results and gives the
error message:
ERROR: objectsdb_type.cpp:207: assertion '0' failed

Since Synplify is bundled by Microsemi, I have no support with Synosys,
nor is there an Actel/Microsemi forum to ask on.

Posted through
I don't have an answer, but I sympathize.  I did a couple of RTAX designs, and the tools are pretty primitive.  Synplify for the Actel does not work as well as it does for other parts.  I get the idea there's one guy at Synopsis who spends one day a week on Actel support.