FPGA Internal or external USB PHY/SIE ??

We need to interface 8 to 16 embedded USB 2.0 devices to an FPGA.

We could just use external ULPI transceivers but am wondering
what FPGAs have transceivers that are USB 2.0 compatible and if
the internal USB SIE gate count is low enough to make it cost
effective to wire the USB devices directly to the FPGA. (Would save
lots of pins ....)

Any suggestions ?

On Sunday, March 27, 2016 at 11:25:52 AM UTC-4, SJA wrote:
> We need to interface 8 to 16 embedded USB 2.0 devices to an FPGA.
>=20
> We could just use external ULPI transceivers but am wondering
> what FPGAs have transceivers that are USB 2.0 compatible and if
> the internal USB SIE gate count is low enough to make it cost
> effective to wire the USB devices directly to the FPGA. (Would save
> lots of pins ....)
>=20

You'll probably find that it is not cost effective to use a full USB implem=
entation inside an FPGA, unless it comes as hard logic already in the devic=
e.  If you use an external PHY, use something with a ULPI interface to mini=
mize the pin count (12 pins if I recall correctly).

If you can get by with a relatively 'slow for USB 2' speeds, you might be b=
etter off using an external USB UART like this http://www.ftdichip.com/Prod=
ucts/ICs/FT232R.htm from FTDI.  The ones I've seen will top out at around 3=
 MBaud, but they are USB 2, the FPGA logic to support is trivial and you ha=
ve a relatively small, simple interface to the part.

Kevin Jennings

KJ <kkjennings@sbcglobal.net> wrote:
> You'll probably find that it is not cost effective to use a full USB
> implementation inside an FPGA, unless it comes as hard logic already in
> the device.  If you use an external PHY, use something with a ULPI
> interface to minimize the pin count (12 pins if I recall correctly).

It's a bit of a headache because I'm not aware of any FPGAs with a hard USB
MAC.  There are commercial soft IP cores for USB, but I have no experience
of them and suspect them to be large.  I don't know of any FPGA vendors who
provide their own USB IP.  Maybe somebody does a relatively compact USB 1.1
MAC as a starting point?

If you want to put the USB off-chip, there are few USB parts particularly
friendly to FPGAs - most are expecting PCIe or similar.  Currently we use
the SAF1761 / ISP1761 but that feels like it's approaching end of line.

> If you can get by with a relatively 'slow for USB 2' speeds, you might be
> better off using an external USB UART like this
> http://www.ftdichip.com/Products/ICs/FT232R.htm from FTDI.  The ones I've
> seen will top out at around 3 MBaud, but they are USB 2, the FPGA logic to
> support is trivial and you have a relatively small, simple interface to
> the part.

Note the OP wants a USB host not a USB device part, so the above won't do.
If a USB device is required, the problem is much easier: there's a variety
of USB microcontrollers - the Cypress EZ-USB FX2 family (CY7C68013) is a
popular choice.

The other troublesome part is the software side: how much of an OS are you
running on or near the FPGA?  USB needs a substantial software stack, and
most of the code out there for host controllers assumes a heavyweight OS.

Theo

SJA wrote:
> We need to interface 8 to 16 embedded USB 2.0 devices to an FPGA.
> 
> We could just use external ULPI transceivers but am wondering
> what FPGAs have transceivers that are USB 2.0 compatible and if
> the internal USB SIE gate count is low enough to make it cost
> effective to wire the USB devices directly to the FPGA. (Would save
> lots of pins ....)
> 
> Any suggestions ?
> 
> 

Xilinx Zynq parts have one USB 2.0 or 3.0 port.  You'd still need
to implement a hub off-chip to connect your peripherals.

-- 
Gabor

GaborSzakacs <gabor@alacron.com> wrote:
> Xilinx Zynq parts have one USB 2.0 or 3.0 port.  You'd still need
> to implement a hub off-chip to connect your peripherals.

Likewise Altera's SoC parts.  It does mean running Linux on the ARM for
driver reasons.  But that's probably the most sensible way to go if you
really need an FPGA with USB host support.

However the main issue is it limits you to a range of SoC silicon: there are
Cyclone V and Arria V SoC parts, but no Stratix currently.  Arria 10 SoC
production silicon is on long lead time at the moment.

Theo

On 3/31/2016 6:16 AM, Theo Markettos wrote:
> GaborSzakacs <gabor@alacron.com> wrote:
>> Xilinx Zynq parts have one USB 2.0 or 3.0 port.  You'd still need
>> to implement a hub off-chip to connect your peripherals.
>
> Likewise Altera's SoC parts.  It does mean running Linux on the ARM for
> driver reasons.  But that's probably the most sensible way to go if you
> really need an FPGA with USB host support.
>
> However the main issue is it limits you to a range of SoC silicon: there are
> Cyclone V and Arria V SoC parts, but no Stratix currently.  Arria 10 SoC
> production silicon is on long lead time at the moment.

The Smart Fusion2 devices from Microsemi also support USB in hardware 
only requiring an external ULPI PHY.  The processor is an ARM CM3 and 
does not require running Linux to use the USB.

-- 

Rick

On Thu, 31 Mar 2016 11:16:32 +0100, Theo Markettos wrote:

> GaborSzakacs <gabor@alacron.com> wrote:
>> Xilinx Zynq parts have one USB 2.0 or 3.0 port.  You'd still need to
>> implement a hub off-chip to connect your peripherals.
> 
> Likewise Altera's SoC parts.  It does mean running Linux on the ARM for
> driver reasons.  But that's probably the most sensible way to go if you
> really need an FPGA with USB host support.

I've seen USB host software available as an add-on for embedded systems 
without Linux.

That's the extent of my knowledge.  It ought to work, and may be sensible 
if you just need a little dingus with USB host capabilities, and not a 
big machine.

-- 

Tim Wescott
Wescott Design Services
http://www.wescottdesign.com

Tim Wescott <seemywebsite@myfooter.really> wrote:
> On Thu, 31 Mar 2016 11:16:32 +0100, Theo Markettos wrote:
> 
> > GaborSzakacs <gabor@alacron.com> wrote:
> >> Xilinx Zynq parts have one USB 2.0 or 3.0 port.  You'd still need to
> >> implement a hub off-chip to connect your peripherals.
> > 
> > Likewise Altera's SoC parts.  It does mean running Linux on the ARM for
> > driver reasons.  But that's probably the most sensible way to go if you
> > really need an FPGA with USB host support.
> 
> I've seen USB host software available as an add-on for embedded systems 
> without Linux.
> 
> That's the extent of my knowledge.  It ought to work, and may be sensible 
> if you just need a little dingus with USB host capabilities, and not a 
> big machine.

The reason it's nontrivial is the IP cores used are typically complex, and
the driver stack assumes a full-fat OS (threading, virtual memory, DMA etc).

If you have a simple IP core, it's possible to write simple software.  With
a complex IP core it is possible to stray 'off piste' and write your own
software, but that depends on the vendor providing documentation.  In the
case of the Synopsys core used on the Cyclone V SoC, which happens to be the
same core as the Raspberry Pi, the core documentation is very confidential. 
A few people have reverse engineered it, but every OS I know about uses the
Synopsys driver - which is 40K LOC.

I didn't look into it much, but the Smartfusion OTG core rickman mentioned
looks simpler and seems like a much better fit.

Theo

On 4/4/2016 8:24 PM, Theo Markettos wrote:
> Tim Wescott <seemywebsite@myfooter.really> wrote:
>> On Thu, 31 Mar 2016 11:16:32 +0100, Theo Markettos wrote:
>>
>>> GaborSzakacs <gabor@alacron.com> wrote:
>>>> Xilinx Zynq parts have one USB 2.0 or 3.0 port.  You'd still need to
>>>> implement a hub off-chip to connect your peripherals.
>>>
>>> Likewise Altera's SoC parts.  It does mean running Linux on the ARM for
>>> driver reasons.  But that's probably the most sensible way to go if you
>>> really need an FPGA with USB host support.
>>
>> I've seen USB host software available as an add-on for embedded systems
>> without Linux.
>>
>> That's the extent of my knowledge.  It ought to work, and may be sensible
>> if you just need a little dingus with USB host capabilities, and not a
>> big machine.
>
> The reason it's nontrivial is the IP cores used are typically complex, and
> the driver stack assumes a full-fat OS (threading, virtual memory, DMA etc).
>
> If you have a simple IP core, it's possible to write simple software.  With
> a complex IP core it is possible to stray 'off piste' and write your own
> software, but that depends on the vendor providing documentation.  In the
> case of the Synopsys core used on the Cyclone V SoC, which happens to be the
> same core as the Raspberry Pi, the core documentation is very confidential.
> A few people have reverse engineered it, but every OS I know about uses the
> Synopsys driver - which is 40K LOC.

What confidential info in the rPi core?  My understanding is that the 
GPU has proprietary aspects, but the core is ARM which is fully 
documented.  Do I not understand this properly?

> I didn't look into it much, but the Smartfusion OTG core rickman mentioned
> looks simpler and seems like a much better fit.

I can't say for sure, I have not tried working with the USB on the 
SmartFusion2 yet.

-- 

Rick

rickman <gnuarm@gmail.com> wrote:
> What confidential info in the rPi core?  My understanding is that the 
> GPU has proprietary aspects, but the core is ARM which is fully 
> documented.  Do I not understand this properly?

We're talking peripheral IP cores.  The Pi has a bunch of IP from third
party vendors - Synopsys (USB), Arasan (SDHCI), maybe others (DDR2
controller?).  Those are proprietary and documentation is not public.
(though the SD core mostly obeys the SDHCI spec so is less of an issue)

Any SoC is much more than the CPU, and it's the I/O where it always gets
messy.

Theo