Forums

Xilinx Spartan II and 5V PCI

Started by Christian E. Boehme August 27, 2004
Hello all,

I am using a Xilinx Spartan II FPGA on a prototype PCI add-in card
as the PCI device attached to the bus.  According to the Spartan II
data sheet it appears that 5V PCI compatible IOs are indeed instantiable
which was the very reason for going with a Spartan II in the first place.

However, after correlating the appropriate requirements from the PCI spec
with what is claimed in the Spartan II data sheet I am not 100% positive
about true 5V PCI compliancy without extra circuitry (namely clamping
diodes to the 5V rail) because the PCI spec requires that a device with-
stand AC worst case voltages of +11V down to -5.5V respectively while the
data sheet gives +7V down to -2V which more or less resembles only the
3.3V PCI AC requirements.  Notice that I am concerned about the over
and under voltages during switching and not the DC or ``5V tolerance''
behaviour of the device.

So, has anyone experienced problems with using Spartan II FPGAs in
typical (read: off-the-shelf el cheapo PCs) 5V PCI environments ?
And while I am at it, should the PCI CLK signal ideally be routed to
one of the GCK{0|1|2|3} inputs with IBUFG_PCI33_5 instantiated ?
Am I wrong with the assumption that the the dedicated pins (/PROGRAM,
Done, M0, M1, M2, and CCLK) only allow a high level of Vccint ?

Any help is greatly appreciated.


Thanks and regards,
Christian Boehme

Christian E. Boehme wrote:

> I am using a Xilinx Spartan II FPGA on a prototype PCI add-in card > as the PCI device attached to the bus. According to the Spartan II > data sheet it appears that 5V PCI compatible IOs are indeed instantiable > which was the very reason for going with a Spartan II in the first place. > > However, after correlating the appropriate requirements from the PCI spec > with what is claimed in the Spartan II data sheet I am not 100% positive > about true 5V PCI compliancy without extra circuitry (namely clamping > diodes to the 5V rail) because the PCI spec requires that a device with- > stand AC worst case voltages of +11V down to -5.5V respectively while the > data sheet gives +7V down to -2V which more or less resembles only the > 3.3V PCI AC requirements. Notice that I am concerned about the over > and under voltages during switching and not the DC or ``5V tolerance'' > behaviour of the device.
PCI spec waveforms (+11V for overshoot, -5.5 for undershoot) are specified at the resistor (55 Ohm for overshoot, 25 Ohm for undershoot) that is part of the test setup, not at the input pin. (section 4.2.1.3) When you overshoot or undershoot, the clamp diodes pass current causing a voltage drop across the resistor resulting in a reduced voltage seen at the input pin. -- Paul Fulghum paulkf@microgate.com
Paul Fulghum wrote:

> PCI spec waveforms (+11V for overshoot, -5.5 for undershoot) > are specified at the resistor (55 Ohm for overshoot, > 25 Ohm for undershoot) that is part of the > test setup, not at the input pin. (section 4.2.1.3)
Said section states that the resistors are voltage source impedances that define the maximum current (ie, the quasi short circuit current that clamping diodes would encounter). That is understood.
> When you overshoot or undershoot, the clamp diodes > pass current causing a voltage drop across the > resistor resulting in a reduced voltage seen at > the input pin.
Problem here is that the voltage drop depends on the input impedance of the following buffer or hi-z value of a tri-stated output. Given a high impedance input buffer (which is usually the case with CMOS devices) the voltage drop would not occur across the resistor as the relatively low output impedance of the voltage source but the input impedance of the buffer unless there is clamping applied. The point I was trying to make was that the data sheet does not explicitly tell whether there are clamping diodes in the 5V PCI qualified buffers or not. Since Vcco is 3.3V maximum at the input banks at the FPGA where would the clamping diodes go without a 5V supply given that clamping to 3.3V is impossible ? Thanks & regards, Christian Boehme
All,

You might try reading the app notes?

http://www.xilinx.com/bvdocs/appnotes/xapp653.pdf

http://www.xilinx.com/bvdocs/appnotes/xapp646.pdf

Austin

Christian E. Boehme wrote:
> Paul Fulghum wrote: > >> PCI spec waveforms (+11V for overshoot, -5.5 for undershoot) >> are specified at the resistor (55 Ohm for overshoot, >> 25 Ohm for undershoot) that is part of the >> test setup, not at the input pin. (section 4.2.1.3) > > > Said section states that the resistors are voltage > source impedances that define the maximum current > (ie, the quasi short circuit current that clamping > diodes would encounter). That is understood. > >> When you overshoot or undershoot, the clamp diodes >> pass current causing a voltage drop across the >> resistor resulting in a reduced voltage seen at >> the input pin. > > > Problem here is that the voltage drop depends on the input > impedance of the following buffer or hi-z value of a tri-stated > output. Given a high impedance input buffer (which is usually > the case with CMOS devices) the voltage drop would not occur > across the resistor as the relatively low output impedance of > the voltage source but the input impedance of the buffer > unless there is clamping applied. > > The point I was trying to make was that the data sheet does > not explicitly tell whether there are clamping diodes in the > 5V PCI qualified buffers or not. Since Vcco is 3.3V maximum > at the input banks at the FPGA where would the clamping diodes > go without a 5V supply given that clamping to 3.3V is impossible ? > > > Thanks & regards, > Christian Boehme >
Again,

Spartan II is identical with Virtex, which means that the clamp diodes 
can be programmed.  Thus the device can operate just fine in the 5V 
environment, and does meet the overshoot requirement of the PCI test 
without any concerns.

The app notes deal with components that can not program the clamps,

Austin

Austin Lesea wrote:

> All, > > You might try reading the app notes? > > http://www.xilinx.com/bvdocs/appnotes/xapp653.pdf > > http://www.xilinx.com/bvdocs/appnotes/xapp646.pdf > > Austin > > Christian E. Boehme wrote: > >> Paul Fulghum wrote: >> >>> PCI spec waveforms (+11V for overshoot, -5.5 for undershoot) >>> are specified at the resistor (55 Ohm for overshoot, >>> 25 Ohm for undershoot) that is part of the >>> test setup, not at the input pin. (section 4.2.1.3) >> >> >> >> Said section states that the resistors are voltage >> source impedances that define the maximum current >> (ie, the quasi short circuit current that clamping >> diodes would encounter). That is understood. >> >>> When you overshoot or undershoot, the clamp diodes >>> pass current causing a voltage drop across the >>> resistor resulting in a reduced voltage seen at >>> the input pin. >> >> >> >> Problem here is that the voltage drop depends on the input >> impedance of the following buffer or hi-z value of a tri-stated >> output. Given a high impedance input buffer (which is usually >> the case with CMOS devices) the voltage drop would not occur >> across the resistor as the relatively low output impedance of >> the voltage source but the input impedance of the buffer >> unless there is clamping applied. >> >> The point I was trying to make was that the data sheet does >> not explicitly tell whether there are clamping diodes in the >> 5V PCI qualified buffers or not. Since Vcco is 3.3V maximum >> at the input banks at the FPGA where would the clamping diodes >> go without a 5V supply given that clamping to 3.3V is impossible ? >> >> >> Thanks & regards, >> Christian Boehme >>
Christian E. Boehme wrote:
> The point I was trying to make was that the data sheet does > not explicitly tell whether there are clamping diodes in the > 5V PCI qualified buffers or not. Since Vcco is 3.3V maximum > at the input banks at the FPGA where would the clamping diodes > go without a 5V supply given that clamping to 3.3V is impossible ?
The Spartan II datasheet, page 2 of module 2: Two forms of over-voltage protection are provided, one that permits 5V compliance, and one that does not. For 5V compliance, a zener-like structure connected to ground turns on when the output rises to approximately 6.5V. When 5V compliance is not required, a conventional clamp diode may be connected to the output supply voltage, VCCO. Page 31 of module 2: I/Os configured for the PCI, 33 MHz, 5V standard are also 5V-tolerant. -- Paul Fulghum paulkf@microgate.com
Austin Lesea wrote:

> You might try reading the app notes? > > http://www.xilinx.com/bvdocs/appnotes/xapp653.pdf
That one I did read and considered it for a while but dropped later due to lack of availability of the part.
> http://www.xilinx.com/bvdocs/appnotes/xapp646.pdf
This one I read also. Too bad that it's not applicable to my problem (namely _5V_ PCI tolerance ;). -Chris
Austin Lesea wrote:

> Spartan II is identical with Virtex, which means that the clamp diodes > can be programmed. Thus the device can operate just fine in the 5V > environment, and does meet the overshoot requirement of the PCI test > without any concerns.
Clamping diodes only work in 3.3V PCI signaling environments. Since these programmable diodes clamp to Vcco and Vcco is 3.3V it's not too hard to imagine what a 5V steady level would do to the power department ;) -Chris
Paul Fulghum wrote:

> The Spartan II datasheet, page 2 of module 2: > > Two forms of over-voltage protection are provided, > one that permits 5V compliance, and one that does not. > For 5V compliance, a zener-like structure connected > to ground turns on when the output rises to > approximately 6.5V.
Probably slipped through because it says nothing about PCI, hmm ...
> Page 31 of module 2: > > I/Os configured for the PCI, 33 MHz, 5V standard are also > 5V-tolerant.
^^^^^^^^^^^ Exactly that was the reason for the concern. I have been dealing with ``5V-tolerant'' standard logic (LVCMOS etcpp.) lately where the meaning of that term is technically something completely different from what I would expect from a ``5V-PCI-compliant'' device built in 3.3V technology. However, apart from the fuzzy 5V compliance and tolerance verbiage in the data sheet, that seems to answer my initial question. Thanks & regards, Christian Boehme
Hi,

Just to re-state how Virtex and Spartan-II behave,
so everyone's on the same page:

When you use the SelectIO Modes "PCI33_3" or "PCI66_3"
the clamp diodes are connected to VCCO (3.3v).  The
device is guaranteed to work in this environment.  You
would not want to use this in a 5.0v slot.

When you use the SelectIO Mode "PCI33_5" the clamp
diodes are not connected.   You can use this in a
5.0v slot.  The device is guaranteed by Xilinx to
work in this environment.

If you are building a universal card, the "right" way
to do it is have two designs/bitstreams only differing
in what SelectIO Mode is used.  Then, at power-on, use
an analog comparator to compare the slot's VIO with
~4.15v (make it with a voltage divider...) and load one
of two bitstreams based on the result.

Eric

"Christian E. Boehme" wrote:
> > Clamping diodes only work in 3.3V PCI signaling environments. > Since these programmable diodes clamp to Vcco and Vcco is 3.3V > it's not too hard to imagine what a 5V steady level would do > to the power department ;) > > -Chris