Active HDL Generic Controls

I am working with Active HDL and I'm pretty sure in the past I was able 
to set generics at the top level from within the simulator.  I see in 
the Design, Settings dialog box they have a Simulation, 
Generic/Parameters choice which looks like it should display design 
generics, but I can't see them.  The help file talks about editing these 
items, but I see no editing controls either.

Anyone know what I'm doing wrong?

-- 

Rick C

On 6/16/2016 4:35 PM, rickman wrote:
> I am working with Active HDL and I'm pretty sure in the past I was able
> to set generics at the top level from within the simulator.  I see in
> the Design, Settings dialog box they have a Simulation,
> Generic/Parameters choice which looks like it should display design
> generics, but I can't see them.  The help file talks about editing these
> items, but I see no editing controls either.
>
> Anyone know what I'm doing wrong?
>
Not a clue, I'm about to install MyDHL on a virtual Windows 7 PC that is 
used to work with FPGAs, it's the final piece of software before I 
declare the image finished, I will have one with Lattice Diamond, and a 
second one with Xilinx Vivado.

I wish that Lattice had more powerful inexpensive board, but they go 
from $43 for the Brevia2 to very expensive boards, It would be nice to 
just have one development system.

-- 
Cecil - k5nwa

On 6/18/2016 3:44 PM, Cecil Bayona wrote:
> On 6/16/2016 4:35 PM, rickman wrote:
>> I am working with Active HDL and I'm pretty sure in the past I was able
>> to set generics at the top level from within the simulator.  I see in
>> the Design, Settings dialog box they have a Simulation,
>> Generic/Parameters choice which looks like it should display design
>> generics, but I can't see them.  The help file talks about editing these
>> items, but I see no editing controls either.
>>
>> Anyone know what I'm doing wrong?
>>
> Not a clue, I'm about to install MyDHL on a virtual Windows 7 PC that is
> used to work with FPGAs, it's the final piece of software before I
> declare the image finished, I will have one with Lattice Diamond, and a
> second one with Xilinx Vivado.
>
> I wish that Lattice had more powerful inexpensive board, but they go
> from $43 for the Brevia2 to very expensive boards, It would be nice to
> just have one development system.

What would you like to see on the board?

-- 

Rick C

On 6/18/2016 8:41 PM, rickman wrote:
> On 6/18/2016 3:44 PM, Cecil Bayona wrote:
>> On 6/16/2016 4:35 PM, rickman wrote:
>>> I am working with Active HDL and I'm pretty sure in the past I was able
>>> to set generics at the top level from within the simulator.  I see in
>>> the Design, Settings dialog box they have a Simulation,
>>> Generic/Parameters choice which looks like it should display design
>>> generics, but I can't see them.  The help file talks about editing these
>>> items, but I see no editing controls either.
>>>
>>> Anyone know what I'm doing wrong?
>>>
>> Not a clue, I'm about to install MyDHL on a virtual Windows 7 PC that is
>> used to work with FPGAs, it's the final piece of software before I
>> declare the image finished, I will have one with Lattice Diamond, and a
>> second one with Xilinx Vivado.
>>
>> I wish that Lattice had more powerful inexpensive board, but they go
>> from $43 for the Brevia2 to very expensive boards, It would be nice to
>> just have one development system.
>
> What would you like to see on the board?
>
A little bigger FPGA, the current one is the smallest in the family so 
it can have more internal RAM and in some CPUs more LUTs doesn't hurt, 
32 bit wide fast external static RAM.

Mind you, the Brevia2 you is a very nice board for $43, the device has a 
few DSP slices, instant on, built in hard devices, SIO, I2C, and a 
timer/PWM device, 128KB of 8 bit wide external SRAM, you can implement 
simple and not so simple Stack based CPUs, but the built in RAM is kind 
of thin, and the external RAM is only 8 bits wide so it makes things 
messy if you need more RAM.

You can get some nice deals from China but they are Xilinx or Altera 
boards, I was looking and there are some nice and fast RAM chips that 
are 16 wide, two of them and you have 32 bit SRAM, so later a plug in 
board might be handy, and might be something I could sell. But right now 
I have too many things going on to tackle that project. There is one 
good deal from Xilinx that you don't have to buy from China, the Arty, 
using the Artix7 chip, 20K LUTs so it can handle more complex projects, 
240KB of internal RAM, and 256MB of 16 bit wide DDR3 RAM, 450MHz 
internal speed for $99

-- 
Cecil - k5nwa

On 6/18/2016 11:13 PM, Cecil Bayona wrote:
> On 6/18/2016 8:41 PM, rickman wrote:
>> On 6/18/2016 3:44 PM, Cecil Bayona wrote:
>>> On 6/16/2016 4:35 PM, rickman wrote:
>>>> I am working with Active HDL and I'm pretty sure in the past I was able
>>>> to set generics at the top level from within the simulator.  I see in
>>>> the Design, Settings dialog box they have a Simulation,
>>>> Generic/Parameters choice which looks like it should display design
>>>> generics, but I can't see them.  The help file talks about editing
>>>> these
>>>> items, but I see no editing controls either.
>>>>
>>>> Anyone know what I'm doing wrong?
>>>>
>>> Not a clue, I'm about to install MyDHL on a virtual Windows 7 PC that is
>>> used to work with FPGAs, it's the final piece of software before I
>>> declare the image finished, I will have one with Lattice Diamond, and a
>>> second one with Xilinx Vivado.
>>>
>>> I wish that Lattice had more powerful inexpensive board, but they go
>>> from $43 for the Brevia2 to very expensive boards, It would be nice to
>>> just have one development system.
>>
>> What would you like to see on the board?
>>
> A little bigger FPGA, the current one is the smallest in the family so
> it can have more internal RAM and in some CPUs more LUTs doesn't hurt,
> 32 bit wide fast external static RAM.
>
> Mind you, the Brevia2 you is a very nice board for $43, the device has a
> few DSP slices, instant on, built in hard devices, SIO, I2C, and a
> timer/PWM device, 128KB of 8 bit wide external SRAM, you can implement
> simple and not so simple Stack based CPUs, but the built in RAM is kind
> of thin, and the external RAM is only 8 bits wide so it makes things
> messy if you need more RAM.
>
> You can get some nice deals from China but they are Xilinx or Altera
> boards, I was looking and there are some nice and fast RAM chips that
> are 16 wide, two of them and you have 32 bit SRAM, so later a plug in
> board might be handy, and might be something I could sell. But right now
> I have too many things going on to tackle that project. There is one
> good deal from Xilinx that you don't have to buy from China, the Arty,
> using the Artix7 chip, 20K LUTs so it can handle more complex projects,
> 240KB of internal RAM, and 256MB of 16 bit wide DDR3 RAM, 450MHz
> internal speed for $99

I'm not clear on your response.  The only thing you would like to see is 
a larger FPGA and faster, wider RAM?

-- 

Rick C

On 6/18/2016 10:25 PM, rickman wrote:
> On 6/18/2016 11:13 PM, Cecil Bayona wrote:
>> On 6/18/2016 8:41 PM, rickman wrote:
>>> On 6/18/2016 3:44 PM, Cecil Bayona wrote:
>>>> On 6/16/2016 4:35 PM, rickman wrote:
>>>>> I am working with Active HDL and I'm pretty sure in the past I was
>>>>> able
>>>>> to set generics at the top level from within the simulator.  I see in
>>>>> the Design, Settings dialog box they have a Simulation,
>>>>> Generic/Parameters choice which looks like it should display design
>>>>> generics, but I can't see them.  The help file talks about editing
>>>>> these
>>>>> items, but I see no editing controls either.
>>>>>
>>>>> Anyone know what I'm doing wrong?
>>>>>
>>>> Not a clue, I'm about to install MyDHL on a virtual Windows 7 PC
>>>> that is
>>>> used to work with FPGAs, it's the final piece of software before I
>>>> declare the image finished, I will have one with Lattice Diamond, and a
>>>> second one with Xilinx Vivado.
>>>>
>>>> I wish that Lattice had more powerful inexpensive board, but they go
>>>> from $43 for the Brevia2 to very expensive boards, It would be nice to
>>>> just have one development system.
>>>
>>> What would you like to see on the board?
>>>
>> A little bigger FPGA, the current one is the smallest in the family so
>> it can have more internal RAM and in some CPUs more LUTs doesn't hurt,
>> 32 bit wide fast external static RAM.
>>
>> Mind you, the Brevia2 you is a very nice board for $43, the device has a
>> few DSP slices, instant on, built in hard devices, SIO, I2C, and a
>> timer/PWM device, 128KB of 8 bit wide external SRAM, you can implement
>> simple and not so simple Stack based CPUs, but the built in RAM is kind
>> of thin, and the external RAM is only 8 bits wide so it makes things
>> messy if you need more RAM.
>>
>> You can get some nice deals from China but they are Xilinx or Altera
>> boards, I was looking and there are some nice and fast RAM chips that
>> are 16 wide, two of them and you have 32 bit SRAM, so later a plug in
>> board might be handy, and might be something I could sell. But right now
>> I have too many things going on to tackle that project. There is one
>> good deal from Xilinx that you don't have to buy from China, the Arty,
>> using the Artix7 chip, 20K LUTs so it can handle more complex projects,
>> 240KB of internal RAM, and 256MB of 16 bit wide DDR3 RAM, 450MHz
>> internal speed for $99
>
> I'm not clear on your response.  The only thing you would like to see is
> a larger FPGA and faster, wider RAM?
>
Yes, although the Brevia2 is not slow, but 32bit fast SRAM and a larger 
FPGA version of it would be great if available for a reasonable price.

Now in case the "Wish Fairy" is listening I would not mind a brand new 
Forrester, and a 50" 4K monitor.

-- 
Cecil - k5nwa