Now that FPGAs have built-in DSP blocks, how commonly is CORDIC used? Is it still a necessary go-to for anyone contemplating doing DSP in an FPGA, or is it starting to ease onto the off-ramp of history? And, putting FPGA use aside -- how common is it is ASICs? -- Tim Wescott Wescott Design Services http://www.wescottdesign.com I'm looking for work -- see my website!
CORDIC in a land of built-in multipliers
Started by ●October 13, 2016
Reply by ●October 13, 20162016-10-13
On Thu, 13 Oct 2016 13:46:18 -0500, Tim Wescott wrote:> Now that FPGAs have built-in DSP blocks, how commonly is CORDIC used? > Is it still a necessary go-to for anyone contemplating doing DSP in an > FPGA, > or is it starting to ease onto the off-ramp of history? > > And, putting FPGA use aside -- how common is it is ASICs?Being bad because I'm cross-posting. Being bad because I'm cross-posting a reply to _my own post_. Oh well -- I'm thinking that maybe some of the folks on comp.dsp who aren't also on comp.arch.fpga will have some thoughts. -- Tim Wescott Wescott Design Services http://www.wescottdesign.com I'm looking for work -- see my website!
Reply by ●October 13, 20162016-10-13
Tim Wescott wrote:> On Thu, 13 Oct 2016 13:46:18 -0500, Tim Wescott wrote: > >> Now that FPGAs have built-in DSP blocks, how commonly is CORDIC used? >> Is it still a necessary go-to for anyone contemplating doing DSP in an >> FPGA, >> or is it starting to ease onto the off-ramp of history? >> >> And, putting FPGA use aside -- how common is it is ASICs? > > Being bad because I'm cross-posting. Being bad because I'm cross-posting > a reply to _my own post_. > > Oh well -- I'm thinking that maybe some of the folks on comp.dsp who > aren't also on comp.arch.fpga will have some thoughts. >I've considered it many times, but never used it. Then again it's not like I use the DSP blocks for CORDIC sorts of things anyhow; I just throw a RAM lookup table at the problem. -- Rob Gaddi, Highland Technology -- www.highlandtechnology.com Email address domain is currently out of order. See above to fix.
Reply by ●October 13, 20162016-10-13
On Thu, 13 Oct 2016 20:59:49 +0000, Rob Gaddi wrote:> Tim Wescott wrote: > >> On Thu, 13 Oct 2016 13:46:18 -0500, Tim Wescott wrote: >> >>> Now that FPGAs have built-in DSP blocks, how commonly is CORDIC used? >>> Is it still a necessary go-to for anyone contemplating doing DSP in an >>> FPGA, >>> or is it starting to ease onto the off-ramp of history? >>> >>> And, putting FPGA use aside -- how common is it is ASICs? >> >> Being bad because I'm cross-posting. Being bad because I'm >> cross-posting a reply to _my own post_. >> >> Oh well -- I'm thinking that maybe some of the folks on comp.dsp who >> aren't also on comp.arch.fpga will have some thoughts. >> >> > I've considered it many times, but never used it. Then again it's not > like I use the DSP blocks for CORDIC sorts of things anyhow; I just > throw a RAM lookup table at the problem.That was the other thing that I should have mentioned. I've heard a lot of talk about CORDIC, but it seems to be one of those things that was Really Critically Important back when an Intel 4004 cost (reputedly) $5 in then-dollars, but maybe isn't so important now, when it seems like the package costs more than the silicon inside it. -- Tim Wescott Wescott Design Services http://www.wescottdesign.com I'm looking for work -- see my website!
Reply by ●October 13, 20162016-10-13
On 10/13/2016 5:10 PM, Tim Wescott wrote:> On Thu, 13 Oct 2016 20:59:49 +0000, Rob Gaddi wrote: > >> Tim Wescott wrote: >> >>> On Thu, 13 Oct 2016 13:46:18 -0500, Tim Wescott wrote: >>> >>>> Now that FPGAs have built-in DSP blocks, how commonly is CORDIC used? >>>> Is it still a necessary go-to for anyone contemplating doing DSP in an >>>> FPGA, >>>> or is it starting to ease onto the off-ramp of history? >>>> >>>> And, putting FPGA use aside -- how common is it is ASICs? >>> >>> Being bad because I'm cross-posting. Being bad because I'm >>> cross-posting a reply to _my own post_. >>> >>> Oh well -- I'm thinking that maybe some of the folks on comp.dsp who >>> aren't also on comp.arch.fpga will have some thoughts. >>> >>> >> I've considered it many times, but never used it. Then again it's not >> like I use the DSP blocks for CORDIC sorts of things anyhow; I just >> throw a RAM lookup table at the problem. > > That was the other thing that I should have mentioned. > > I've heard a lot of talk about CORDIC, but it seems to be one of those > things that was Really Critically Important back when an Intel 4004 cost > (reputedly) $5 in then-dollars, but maybe isn't so important now, when it > seems like the package costs more than the silicon inside it.There are still FPGAs at the lower end that don't include multipliers. I have an older design in a small FPGA I am still shipping that does the iterative adding thing. It has been a while since I considered using the CORDIC algorithm. What exactly is the advantage of the CORDIC algorithm again? -- Rick C
Reply by ●October 13, 20162016-10-13
On Thu, 13 Oct 2016 18:14:58 -0400, rickman wrote:> On 10/13/2016 5:10 PM, Tim Wescott wrote: >> On Thu, 13 Oct 2016 20:59:49 +0000, Rob Gaddi wrote: >> >>> Tim Wescott wrote: >>> >>>> On Thu, 13 Oct 2016 13:46:18 -0500, Tim Wescott wrote: >>>> >>>>> Now that FPGAs have built-in DSP blocks, how commonly is CORDIC >>>>> used? Is it still a necessary go-to for anyone contemplating doing >>>>> DSP in an FPGA, >>>>> or is it starting to ease onto the off-ramp of history? >>>>> >>>>> And, putting FPGA use aside -- how common is it is ASICs? >>>> >>>> Being bad because I'm cross-posting. Being bad because I'm >>>> cross-posting a reply to _my own post_. >>>> >>>> Oh well -- I'm thinking that maybe some of the folks on comp.dsp who >>>> aren't also on comp.arch.fpga will have some thoughts. >>>> >>>> >>> I've considered it many times, but never used it. Then again it's not >>> like I use the DSP blocks for CORDIC sorts of things anyhow; I just >>> throw a RAM lookup table at the problem. >> >> That was the other thing that I should have mentioned. >> >> I've heard a lot of talk about CORDIC, but it seems to be one of those >> things that was Really Critically Important back when an Intel 4004 >> cost (reputedly) $5 in then-dollars, but maybe isn't so important now, >> when it seems like the package costs more than the silicon inside it. > > There are still FPGAs at the lower end that don't include multipliers. I > have an older design in a small FPGA I am still shipping that does the > iterative adding thing. It has been a while since I considered using > the CORDIC algorithm. What exactly is the advantage of the CORDIC > algorithm again?It uses less gates. Which is why I'm asking my question -- gates seem to be a lot cheaper these days, so do people still use CORDIC? -- Tim Wescott Wescott Design Services http://www.wescottdesign.com I'm looking for work -- see my website!
Reply by ●October 13, 20162016-10-13
On 10/13/2016 6:16 PM, Tim Wescott wrote:> On Thu, 13 Oct 2016 18:14:58 -0400, rickman wrote: > >> On 10/13/2016 5:10 PM, Tim Wescott wrote: >>> On Thu, 13 Oct 2016 20:59:49 +0000, Rob Gaddi wrote: >>> >>>> Tim Wescott wrote: >>>> >>>>> On Thu, 13 Oct 2016 13:46:18 -0500, Tim Wescott wrote: >>>>> >>>>>> Now that FPGAs have built-in DSP blocks, how commonly is CORDIC >>>>>> used? Is it still a necessary go-to for anyone contemplating doing >>>>>> DSP in an FPGA, >>>>>> or is it starting to ease onto the off-ramp of history? >>>>>> >>>>>> And, putting FPGA use aside -- how common is it is ASICs? >>>>> >>>>> Being bad because I'm cross-posting. Being bad because I'm >>>>> cross-posting a reply to _my own post_. >>>>> >>>>> Oh well -- I'm thinking that maybe some of the folks on comp.dsp who >>>>> aren't also on comp.arch.fpga will have some thoughts. >>>>> >>>>> >>>> I've considered it many times, but never used it. Then again it's not >>>> like I use the DSP blocks for CORDIC sorts of things anyhow; I just >>>> throw a RAM lookup table at the problem. >>> >>> That was the other thing that I should have mentioned. >>> >>> I've heard a lot of talk about CORDIC, but it seems to be one of those >>> things that was Really Critically Important back when an Intel 4004 >>> cost (reputedly) $5 in then-dollars, but maybe isn't so important now, >>> when it seems like the package costs more than the silicon inside it. >> >> There are still FPGAs at the lower end that don't include multipliers. I >> have an older design in a small FPGA I am still shipping that does the >> iterative adding thing. It has been a while since I considered using >> the CORDIC algorithm. What exactly is the advantage of the CORDIC >> algorithm again? > > It uses less gates. Which is why I'm asking my question -- gates seem to > be a lot cheaper these days, so do people still use CORDIC?Can you explain that briefly? Why is it less gates than an adder? Adders are pretty durn simple. I thought the CORDIC algorithm used an ADD. -- Rick C
Reply by ●October 13, 20162016-10-13
On 10/13/2016 9:33 PM, rickman wrote:> On 10/13/2016 6:16 PM, Tim Wescott wrote: >> On Thu, 13 Oct 2016 18:14:58 -0400, rickman wrote: >> >>> On 10/13/2016 5:10 PM, Tim Wescott wrote: >>>> On Thu, 13 Oct 2016 20:59:49 +0000, Rob Gaddi wrote: >>>> >>>>> Tim Wescott wrote: >>>>> >>>>>> On Thu, 13 Oct 2016 13:46:18 -0500, Tim Wescott wrote: >>>>>> >>>>>>> Now that FPGAs have built-in DSP blocks, how commonly is CORDIC >>>>>>> used? Is it still a necessary go-to for anyone contemplating doing >>>>>>> DSP in an FPGA, >>>>>>> or is it starting to ease onto the off-ramp of history? >>>>>>> >>>>>>> And, putting FPGA use aside -- how common is it is ASICs? >>>>>> >>>>>> Being bad because I'm cross-posting. Being bad because I'm >>>>>> cross-posting a reply to _my own post_. >>>>>> >>>>>> Oh well -- I'm thinking that maybe some of the folks on comp.dsp who >>>>>> aren't also on comp.arch.fpga will have some thoughts. >>>>>> >>>>>> >>>>> I've considered it many times, but never used it. Then again it's not >>>>> like I use the DSP blocks for CORDIC sorts of things anyhow; I just >>>>> throw a RAM lookup table at the problem. >>>> >>>> That was the other thing that I should have mentioned. >>>> >>>> I've heard a lot of talk about CORDIC, but it seems to be one of those >>>> things that was Really Critically Important back when an Intel 4004 >>>> cost (reputedly) $5 in then-dollars, but maybe isn't so important now, >>>> when it seems like the package costs more than the silicon inside it. >>> >>> There are still FPGAs at the lower end that don't include multipliers. I >>> have an older design in a small FPGA I am still shipping that does the >>> iterative adding thing. It has been a while since I considered using >>> the CORDIC algorithm. What exactly is the advantage of the CORDIC >>> algorithm again? >> >> It uses less gates. Which is why I'm asking my question -- gates seem to >> be a lot cheaper these days, so do people still use CORDIC? > > Can you explain that briefly? Why is it less gates than an adder? > Adders are pretty durn simple. I thought the CORDIC algorithm used an ADD.Opps, I see the CORDIC doesn't replace a multiplication... it replaces a sine calculation. I told you it had been a while since I looked at it. Yes, I recall now the CORDIC typically converges faster than a power series and requires no multiplications. Do I have it now? Using fewer gates is a bit of an understatement. -- Rick C
Reply by ●October 13, 20162016-10-13
On 10/13/2016 03:16 PM, Tim Wescott wrote:> On Thu, 13 Oct 2016 18:14:58 -0400, rickman wrote: > >> On 10/13/2016 5:10 PM, Tim Wescott wrote: >>> On Thu, 13 Oct 2016 20:59:49 +0000, Rob Gaddi wrote: >>> >>>> Tim Wescott wrote: >>>> >>>>> On Thu, 13 Oct 2016 13:46:18 -0500, Tim Wescott wrote: >>>>> >>>>>> Now that FPGAs have built-in DSP blocks, how commonly is CORDIC >>>>>> used? Is it still a necessary go-to for anyone contemplating doing >>>>>> DSP in an FPGA, >>>>>> or is it starting to ease onto the off-ramp of history? >>>>>> >>>>>> And, putting FPGA use aside -- how common is it is ASICs? >>>>> >>>>> Being bad because I'm cross-posting. Being bad because I'm >>>>> cross-posting a reply to _my own post_. >>>>> >>>>> Oh well -- I'm thinking that maybe some of the folks on comp.dsp who >>>>> aren't also on comp.arch.fpga will have some thoughts. >>>>> >>>>> >>>> I've considered it many times, but never used it. Then again it's not >>>> like I use the DSP blocks for CORDIC sorts of things anyhow; I just >>>> throw a RAM lookup table at the problem. >>> >>> That was the other thing that I should have mentioned. >>> >>> I've heard a lot of talk about CORDIC, but it seems to be one of those >>> things that was Really Critically Important back when an Intel 4004 >>> cost (reputedly) $5 in then-dollars, but maybe isn't so important now, >>> when it seems like the package costs more than the silicon inside it. >> >> There are still FPGAs at the lower end that don't include multipliers. I >> have an older design in a small FPGA I am still shipping that does the >> iterative adding thing. It has been a while since I considered using >> the CORDIC algorithm. What exactly is the advantage of the CORDIC >> algorithm again? > > It uses less gates. Which is why I'm asking my question -- gates seem to > be a lot cheaper these days, so do people still use CORDIC? >My understanding (kind of limited) is that CORDIC is used for trig and exponential calculations, more than just multiplication. I have never used a CORDIC implementation in an FPGA or an ASIC. I tend to do more control path and communications implementations than DSP/data path stuff though. BobH
Reply by ●October 14, 20162016-10-14
> I've heard a lot of talk about CORDIC, but it seems to be one of those > things that was Really Critically Important back when an Intel 4004 cost > (reputedly) $5 in then-dollars,It was used in (HP-)pocket calculators then and got well known that way. Later on floating point coprocessors. 8087, probably up to MC68882. Guess Cyrix were the first there to implement a big float multiplier and do it differently. In the 70ies and 80ies on (rad-hard) RCA1802 CPUs in AMSAT satellites. It calculates not only sin, cos, but also atan, atanh, sinh, cosh ... For navigation, robotics on small memory it may be still usefull. But who knows after all these years what it is and how to implement it ? Same for Logarithmic Number Systems ( LNS ). There may be niche applications that benefit, but industry will not offer it, because customers will not know & buy. MfG JRD
