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Intel (Altera) announces Cyclone-10

Started by GaborSzakacs February 16, 2017
It looks like Intel has learned to count from Microsoft.  The previous
generation of Cyclone was Cyclone-5.


https://www.altera.com/products/fpga/cyclone-series/cyclone-10.html

-- 
Gabor
On 2/16/2017 11:52 AM, GaborSzakacs wrote:
> > It looks like Intel has learned to count from Microsoft. The previous > generation of Cyclone was Cyclone-5. > > > https://www.altera.com/products/fpga/cyclone-series/cyclone-10.html
Maybe they doubled the number because they're twice as good? -- Rick C
On 2/16/2017 2:10 PM, rickman wrote:
> On 2/16/2017 11:52 AM, GaborSzakacs wrote: >> >> It looks like Intel has learned to count from Microsoft. The previous >> generation of Cyclone was Cyclone-5. >> >> >> https://www.altera.com/products/fpga/cyclone-series/cyclone-10.html > > Maybe they doubled the number because they're twice as good?
Cyclone 10 GX "Twice higher performance than the previous generation of low cost FPGAs" tee hee Although it is interesting to note the GX (high performance) series has 8 input ALMs, 20 kb memory blocks, 27x27 bit multipliers, floating point multipliers, coefficient register banks, all in a 20 nm process while the LP series has 4 input LUTs, 9 kb memory blocks, 18x18 bit multipliers, no floating point or coefficient register banks and no statement of process. It would appear that to achieve low(er) power they opted for an older process, leveraging existing series of FPGAs for the LP series. Like a Cyclone V redo. It would be interesting to see what sort of stack CPU could be made with the GX series. I wonder if the design software is out yet? -- Rick C
On 2/16/2017 2:37 PM, rickman wrote:
> On 2/16/2017 2:10 PM, rickman wrote: >> On 2/16/2017 11:52 AM, GaborSzakacs wrote: >>> >>> It looks like Intel has learned to count from Microsoft. The previous >>> generation of Cyclone was Cyclone-5. >>> >>> >>> https://www.altera.com/products/fpga/cyclone-series/cyclone-10.html >> >> Maybe they doubled the number because they're twice as good? > > Cyclone 10 GX > > "Twice higher performance than the previous generation of low cost FPGAs" > > tee hee > > Although it is interesting to note the GX (high performance) series has > 8 input ALMs, 20 kb memory blocks, 27x27 bit multipliers, floating point > multipliers, coefficient register banks, all in a 20 nm process while > the LP series has 4 input LUTs, 9 kb memory blocks, 18x18 bit > multipliers, no floating point or coefficient register banks and no > statement of process. It would appear that to achieve low(er) power > they opted for an older process, leveraging existing series of FPGAs for > the LP series. Like a Cyclone V redo. > > It would be interesting to see what sort of stack CPU could be made with > the GX series. I wonder if the design software is out yet?
Looks to me like there is no support for these devices as yet. They mention an M164 package which seems to be a type of BGA, but I can't find it in their package data sheet... or more accurately I can't find their package data sheet. I keep finding package info on "mature" devices or other obsolete sheets. I have a copy from 2007 which shows MBGA packages with 0.5 mm ball spacing, but the 164 pin part is not there. The really weird part is the package data sheets I can find list updates to add the M164 part, but it is nowhere to be found in the technical data. I guess they just copied the update table when they made the "mature device" data sheet. Even that is dated 2011. WTF!? -- Rick C
> >> It looks like Intel has learned to count from Microsoft. The previous > >> generation of Cyclone was Cyclone-5.
I think the numbering is the least concern with this "new" family (no surpr= ise, as there is already Max 10, Arria 10 and Stratix 10 - with similar jum= ps). However, it is pretty obvious that: Cyclone 10 LP =3D Cyclone III / IV E Cyclone 10 GX =3D Arria 10 GX (Such a strategy has long tradition for Altera, look at FLEX10K/ACEX1K, Cyc= lone III/IV E, MAX II/V...) It is mainly a marketing / pricing move, which of course is OK if there is = pricing benefit for the customer. But I always found the way it was communi= cated pretty misleading... (Very dishonest. Fake news.) (I had no contact t= o an Altera/Intel FAE recently - not sure how they communicate this.) However, especially Arria 10 GX for Cyclone pricing could be a real deal. (= Great deal. So wonderful.) The main question (for many applications) is if Cyclone 10 GX has a lower p= ower consumption than Arria 10 Gx - I doubt. Regards Thomas (sorry, couldn't resist...)
rickman wrote:
> On 2/16/2017 2:37 PM, rickman wrote: >> On 2/16/2017 2:10 PM, rickman wrote: >>> On 2/16/2017 11:52 AM, GaborSzakacs wrote: >>>> >>>> It looks like Intel has learned to count from Microsoft. The previous >>>> generation of Cyclone was Cyclone-5. >>>> >>>> >>>> https://www.altera.com/products/fpga/cyclone-series/cyclone-10.html >>> >>> Maybe they doubled the number because they're twice as good? >> >> Cyclone 10 GX >> >> "Twice higher performance than the previous generation of low cost FPGAs" >> >> tee hee >> >> Although it is interesting to note the GX (high performance) series has >> 8 input ALMs, 20 kb memory blocks, 27x27 bit multipliers, floating point >> multipliers, coefficient register banks, all in a 20 nm process while >> the LP series has 4 input LUTs, 9 kb memory blocks, 18x18 bit >> multipliers, no floating point or coefficient register banks and no >> statement of process. It would appear that to achieve low(er) power >> they opted for an older process, leveraging existing series of FPGAs for >> the LP series. Like a Cyclone V redo. >> >> It would be interesting to see what sort of stack CPU could be made with >> the GX series. I wonder if the design software is out yet? > > Looks to me like there is no support for these devices as yet. > > They mention an M164 package which seems to be a type of BGA, but I > can't find it in their package data sheet... or more accurately I can't > find their package data sheet. I keep finding package info on "mature" > devices or other obsolete sheets. I have a copy from 2007 which shows > MBGA packages with 0.5 mm ball spacing, but the 164 pin part is not > there. The really weird part is the package data sheets I can find list > updates to add the M164 part, but it is nowhere to be found in the > technical data. I guess they just copied the update table when they > made the "mature device" data sheet. Even that is dated 2011. WTF!? >
As far as I can tell this is (very) advanced information. I have to wonder if the announcement was timed to take some wind out of the sails of the MicroSemi "PolarFire" announcement: https://www.microsemi.com/products/fpga-soc/fpga/polarfire-fpga At the moment, both the Altera and MicroSemi offerings seem to be unobtainium... -- Gabor
On Thursday, February 16, 2017 at 10:16:54 PM UTC+2, thomas....@gmail.com wrote:
> > >> It looks like Intel has learned to count from Microsoft. The previous > > >> generation of Cyclone was Cyclone-5. > > I think the numbering is the least concern with this "new" family (no surprise, as there is already Max 10, Arria 10 and Stratix 10 - with similar jumps). > > However, it is pretty obvious that: > Cyclone 10 LP = Cyclone III / IV E
So, if 10LP is renamed IV E, which in turn is renamed III, does it follow that 10LP is manufactured on TSMC 60 nm processs ?
> Cyclone 10 GX = Arria 10 GX
Including the two smallest ones? Hopefully, you are too pessimistic about it. If 10CX085 and 10CX105 are in reality just 10AX027 with majority of die fused off then its ratio of performance to static power consumption will be quit bad. It happened to smaller members of Arria-II family and it was not nice.
> > (Such a strategy has long tradition for Altera, look at FLEX10K/ACEX1K, Cyclone III/IV E, MAX II/V...) > > It is mainly a marketing / pricing move, which of course is OK if there is pricing benefit for the customer. But I always found the way it was communicated pretty misleading... (Very dishonest. Fake news.) (I had no contact to an Altera/Intel FAE recently - not sure how they communicate this.) > > However, especially Arria 10 GX for Cyclone pricing could be a real deal. (Great deal. So wonderful.) > > The main question (for many applications) is if Cyclone 10 GX has a lower power consumption than Arria 10 Gx - I doubt. > > Regards > > Thomas (sorry, couldn't resist...)
On 2/17/2017 5:21 AM, already5chosen@yahoo.com wrote:
> On Thursday, February 16, 2017 at 10:16:54 PM UTC+2, thomas....@gmail.com wrote: >>>>> It looks like Intel has learned to count from Microsoft. The previous >>>>> generation of Cyclone was Cyclone-5. >> >> I think the numbering is the least concern with this "new" family (no surprise, as there is already Max 10, Arria 10 and Stratix 10 - with similar jumps). >> >> However, it is pretty obvious that: >> Cyclone 10 LP = Cyclone III / IV E > > So, if 10LP is renamed IV E, which in turn is renamed III, does it follow that 10LP is manufactured on TSMC 60 nm processs ? > >> Cyclone 10 GX = Arria 10 GX > > Including the two smallest ones? > Hopefully, you are too pessimistic about it. > If 10CX085 and 10CX105 are in reality just 10AX027 with majority of die fused off then its ratio of performance to static power consumption will be quit bad. > It happened to smaller members of Arria-II family and it was not nice.
I wonder how long it will be before Altera transitions over to Intel fabs and/or if that will be an improvement or not. It's interesting to me that the low end of the Cyclone 10 LP is just 6 kLUTs. That's my territory. No pricing yet and the packaging is still pretty bad for low end work. The choices are huge BGAs, a huge TQFP and smaller BGA that requires very fine artwork on the PCB which means no low cost PCB processes. I guess I could just use every other pin or something. -- Rick C
On Friday, February 17, 2017 at 12:29:39 PM UTC+2, rickman wrote:
> On 2/17/2017 5:21 AM, already5chosen@yahoo.com wrote: > > On Thursday, February 16, 2017 at 10:16:54 PM UTC+2, thomas....@gmail.com wrote: > >>>>> It looks like Intel has learned to count from Microsoft. The previous > >>>>> generation of Cyclone was Cyclone-5. > >> > >> I think the numbering is the least concern with this "new" family (no surprise, as there is already Max 10, Arria 10 and Stratix 10 - with similar jumps). > >> > >> However, it is pretty obvious that: > >> Cyclone 10 LP = Cyclone III / IV E > > > > So, if 10LP is renamed IV E, which in turn is renamed III, does it follow that 10LP is manufactured on TSMC 60 nm processs ? > > > >> Cyclone 10 GX = Arria 10 GX > > > > Including the two smallest ones? > > Hopefully, you are too pessimistic about it. > > If 10CX085 and 10CX105 are in reality just 10AX027 with majority of die fused off then its ratio of performance to static power consumption will be quit bad. > > It happened to smaller members of Arria-II family and it was not nice. > > I wonder how long it will be before Altera transitions over to Intel > fabs and/or if that will be an improvement or not.
According to my understanding, official line is the same as before acquisition: only high end (Stratix 10) will be manufactured at Intel's fabs. The rest remains on TSMC. But I didn't follow the news too closely.
> > It's interesting to me that the low end of the Cyclone 10 LP is just 6 > kLUTs. That's my territory.
I can not judge for sure, but it seems to me that "your territory" is MAX-10.
> No pricing yet and the packaging is still > pretty bad for low end work. The choices are huge BGAs, a huge TQFP and > smaller BGA that requires very fine artwork on the PCB which means no > low cost PCB processes. I guess I could just use every other pin or > something. > > -- > > Rick C
> > So, if 10LP is renamed IV E, which in turn is renamed III, does it follow that 10LP is manufactured on TSMC 60 nm processs ?
This is indeed the case, it is even somewhere on their homepage, google for Cyclone 10 and 60nm... (Maybe they use a different flavour of 60nm process with better characteristics, but I do not really think so. Cyclone IV was at least the shrinked from 65nm to 60nm, but this was also done for Cyclone III). Interestingly, on the TSMC homepage, there is no 60nm process, only 65nm and 55nm..)
> > Cyclone 10 GX = Arria 10 GX > > Including the two smallest ones? > Hopefully, you are too pessimistic about it. > If 10CX085 and 10CX105 are in reality just 10AX027 with majority of die fused off then its ratio of performance to static power consumption will be quit bad.
I fully agree on this. It they had a smaller die (with reduced power consumption) and Cyclone pricing, this would be a real good product... But I doubt it. Another interesting questions is if there also comes a Cyclone 10 SX with SoC? I think this is mainly a marketing thing to have something against Spartan 7, until the real new stuff is ready. Regards, Thomas www.entner-electronics.com - Home of EEBlaster and JPEG Codec