Simple Counter in Verilog

I am moving onto Verilog now from VHDL due to it being too complicated for me to start off with and not having any calsses available to go to in order to teach me it. So far Ive been just trying to make a simple counter that would pulse an led every second, and so far no luck. Im getting errors left and right, when I change one thing, I get another error, and when I fix that I seem to get others. I have no idea what Im doing wrong, everyhting looks like it would run fine from what Ive read. So if you can let me know what my errors are. Thank you!

CODE:

module pulse(led_o, clk50);

input clk50;
output led_o;
  reg [15:0] c;

always @(posedge clk50) //Trigger on 50MHz clock
  begin
    if (c == 50000000) //Convert 50MHz Clock to 1Hz <= 0; led_o <= 1; //Turn led on
wait (50ms) //wait 50ms
led_o <= 0; //turn led off

else
    c <= c + 1; //Step up c +1
  end

endmodule

ERRORS:

ERROR:HDLCompilers:26 - clock.v line 12 unexpected token: '50'
ERROR:HDLCompilers:26 - clock.v line 15 expecting 'end', found 'else'
ERROR:HDLCompilers:26 - clock.v line 16 unexpected token: '<='
ERROR:HDLCompilers:26 - clock.v line 16 unexpected token: '+'
ERROR:HDLCompilers:26 - clock.v line 16 expecting 'endmodule', found '1'
ERROR: XST failed

Ive been useing this as a reference: <http://www.sutherland-hdl.com/on-line_ref_guide/vlog_ref_top.html>

I suppose it isnt very good considering how far it has gotten me. If anyone else knows of a good online resource just to look up little things like wait, if, begin type stuff with proper sytax let me know!

Thanks!
-Weizbox

It's a while since I did any Verilog, so I'm not gonna fix your syntax, but
I don't think wait(50ms) is synthesisable. Also, a sixteen bit register
isn't big enough to count to 5e7.
You might like to try comp.lang.verilog ?
Cheers, Syms.
<Weizbox> wrote in message news:ee89141.-1@webx.sUN8CHnE...
> I am moving onto Verilog now from VHDL due to it being too complicated for
me to start off with and not having any calsses available to go to in order
to teach me it. So far Ive been just trying to make a simple counter that
would pulse an led every second, and so far no luck. Im getting errors left
and right, when I change one thing, I get another error, and when I fix that
I seem to get others. I have no idea what Im doing wrong, everyhting looks
like it would run fine from what Ive read. So if you can let me know what my
errors are. Thank you!
>
> CODE:
>
> module pulse(led_o, clk50);
>
> input clk50;
> output led_o;
>   reg [15:0] c;
>
> always @(posedge clk50) //Trigger on 50MHz clock
>   begin
>     if (c == 50000000) //Convert 50MHz Clock to 1Hz <= 0; led_o <= 1;
//Turn led on
> wait (50ms) //wait 50ms
> led_o <= 0; //turn led off
>
> else
>     c <= c + 1; //Step up c +1
>   end
>
> endmodule
>
> ERRORS:
>
> ERROR:HDLCompilers:26 - clock.v line 12 unexpected token: '50'
> ERROR:HDLCompilers:26 - clock.v line 15 expecting 'end', found 'else'
> ERROR:HDLCompilers:26 - clock.v line 16 unexpected token: '<='
> ERROR:HDLCompilers:26 - clock.v line 16 unexpected token: '+'
> ERROR:HDLCompilers:26 - clock.v line 16 expecting 'endmodule', found '1'
> ERROR: XST failed
>
> Ive been useing this as a reference:
<http://www.sutherland-hdl.com/on-line_ref_guide/vlog_ref_top.html>
>
> I suppose it isnt very good considering how far it has gotten me. If
anyone else knows of a good online resource just to look up little things
like wait, if, begin type stuff with proper sytax let me know!
>
> Thanks!
> -Weizbox

Thanks! Im really new to this and a lot of differnt sites dont make things all that clear so its hard to tell whats right and whats wrong. The sixteen bit was an oversight :-/ Thanks for the input tho.. Ill try the group as well!

In article <ee89141.-1@webx.sUN8CHnE>, Weizbox  <> wrote:
>
>module pulse(led_o, clk50);
>
>input clk50;
>output led_o;
>  reg [15:0] c;

make that big enough to hold 50000000, at least 26 bits.

make an output register

reg led;
assign led_o = led;

>always @(posedge clk50) //Trigger on 50MHz clock
>  begin
>    if (c == 50000000) //Convert 50MHz Clock to 1Hz <= 0; led_o <= 1;
	c <= 0; // reset counter
	led <= ~led; // toggle led
>
>else
>    c <= c + 1; //Step up c +1
>  end
>
>endmodule

Offhand I think that will do what you want.  With clock driven logic
you can't just 'wait', you have to maintain some sort of state (in this
case just whether the LED is off or on) and come back to it at a later
clock edge, based on some counter or signal.

-- 
Ben Jackson
<ben@ben.com>
http://www.ben.com/

Hi - 

The synthesizer isn't going to know what to do with wait(50ms).  In
fact, I've never seen wait() used with a delay inside.  

Here's my template for an up counter.  ga_reset is the global
asynchronous reset:

>  always @(posedge clk or posedge ga_reset)
>    if      (ga_reset)           <name>_ctr <= 0;          // Asynchronous reset
>    else if (sync_reset)         <name>_ctr <= <name>_sync_init_val; // Synchronous init
>    else if (<name>_preload_en)  <name>_ctr <= <name>_preload_val; // Synchronous preload
>    else if (<name>_up_count_en) <name>_ctr <= <name>_ctr + 1;    // Synchronous count

I wouldn't be too quick to dismiss Stuart Sutherland's reference
guide.  I use the printed version all the time, and it's extremely
handy.  His online guide says:

wait (expression)
    Delays execution until the expression evaluates as true.

This agrees with the IEEE spec.

John Sanguinetti has a free online training course:

http://www.vol.webnexus.com/

Bob Perlman
Cambrian Design Works

On Mon, 27 Sep 2004 12:01:32 -0700, Weizbox <> wrote:

>I am moving onto Verilog now from VHDL due to it being too complicated for me to start off with and not having any calsses available to go to in order to teach me it. So far Ive been just trying to make a simple counter that would pulse an led every second, and so far no luck. Im getting errors left and right, when I change one thing, I get another error, and when I fix that I seem to get others. I have no idea what Im doing wrong, everyhting looks like it would run fine from what Ive read. So if you can let me know what my errors are. Thank you!
>
>CODE:
>
>module pulse(led_o, clk50);
>
>input clk50;
>output led_o;
>  reg [15:0] c;
>
>always @(posedge clk50) //Trigger on 50MHz clock
>  begin
>    if (c == 50000000) //Convert 50MHz Clock to 1Hz <= 0; led_o <= 1; //Turn led on
>wait (50ms) //wait 50ms
>led_o <= 0; //turn led off
>
>else
>    c <= c + 1; //Step up c +1
>  end
>
>endmodule
>
>ERRORS:
>
>ERROR:HDLCompilers:26 - clock.v line 12 unexpected token: '50'
>ERROR:HDLCompilers:26 - clock.v line 15 expecting 'end', found 'else'
>ERROR:HDLCompilers:26 - clock.v line 16 unexpected token: '<='
>ERROR:HDLCompilers:26 - clock.v line 16 unexpected token: '+'
>ERROR:HDLCompilers:26 - clock.v line 16 expecting 'endmodule', found '1'
>ERROR: XST failed
>
>Ive been useing this as a reference: <http://www.sutherland-hdl.com/on-line_ref_guide/vlog_ref_top.html>
>
>I suppose it isnt very good considering how far it has gotten me. If anyone else knows of a good online resource just to look up little things like wait, if, begin type stuff with proper sytax let me know!
>
>Thanks!
>-Weizbox

I agree with this response, but I think you missed a begin-end pair. 
You only want to toggle the LED when the counter wraps.  See below.

Cheers,
Chris

always @(posedge clk50) //Trigger on 50MHz clock
  begin
    if (c == 50000000)  //Convert 50MHz Clock to 1Hz <= 0; led_o <= 1;
      begin
        c   <= 0;       // reset counter
        led <= ~led;    // toggle led (when ctr wraps)
      end
    else
      c     <= c + 1;   //Step up c +1
  end


ben@ben.com (Ben Jackson) wrote in message news:<3X%5d.270176$Fg5.97056@attbi_s53>...
> In article <ee89141.-1@webx.sUN8CHnE>, Weizbox  <> wrote:
> >
> >module pulse(led_o, clk50);
> >
> >input clk50;
> >output led_o;
> >  reg [15:0] c;
> 
> make that big enough to hold 50000000, at least 26 bits.
> 
> make an output register
> 
> reg led;
> assign led_o = led;
> 
> >always @(posedge clk50) //Trigger on 50MHz clock
> >  begin
> >    if (c == 50000000) //Convert 50MHz Clock to 1Hz <= 0; led_o <= 1;
> 	c <= 0; // reset counter
> 	led <= ~led; // toggle led
> >
> >else
> >    c <= c + 1; //Step up c +1
> >  end
> >
> >endmodule
> 
> Offhand I think that will do what you want.  With clock driven logic
> you can't just 'wait', you have to maintain some sort of state (in this
> case just whether the LED is off or on) and come back to it at a later
> clock edge, based on some counter or signal.

Bob Perlman <bobsrefusebin@hotmail.com> wrote in message news:<p03hl0tj9t776u2i0jnrl02oecn5g7lqjv@4ax.com>...

> I wouldn't be too quick to dismiss Stuart Sutherland's reference
> guide.  I use the printed version all the time, and it's extremely
> handy.

Agreed, although it assumes that you know the language and need a
cheat-sheet.  Of course, that cheat-sheet comes in handy all the time!
 That's why it's always on top of the monitor or someplace else
nearby.

-a