http://uclinux.openchip.org/forum/viewtopic.php?t=4 here is proof :) the opensource version as available from opencores is not yet good enough to run uCLinux - well lets see if that will change, I think there is a wish to have an open-souce multi-vendor FPGA softcare capable to run uCLinux inside many people :) Antti
Open-Source MicroBlaze IP-Core working in FPGA :)
Started by ●October 1, 2004
Reply by ●October 2, 20042004-10-02
Antti Lukats wrote:> http://uclinux.openchip.org/forum/viewtopic.php?t=4 > > here is proof :) > > the opensource version as available from opencores is not yet good enough to > run uCLinux - well lets see if that will change, > I think there is a wish to have an open-souce multi-vendor FPGA softcare > capable to run uCLinux inside many people :)And this is what irks me...if you "need" a "free" FPGA cpu core, there are already several to choose from (www.opencores.org.) One of them even has a full GNU-tool chain. So what makes the Microblaze so special? Is it because it has some industry recognition, better performance/functionality, or is it simply because more people have already used it, and want to continue use what they're familiar with? Maybe it's because Xilinx poured in a lot of R&D into Microblaze, proved the design, and are committed to future support of it. Enough customers haved used the design that people in the industry collectively 'know' its strengths/weaknesses. Sorry I went off on a rant...I'm struggling to understand why OpenRISC 1k, despite being 'proven' for more than a year, isn't really showing up anywhere. For ASICS, the answer is obvious -- just the mask-order (for 0.18u standard cell) is $300,000USD -- big enough that no sane engineer will 'sign-off' on a free design with no proven track record. For FPGAs, well there's the Xilinx Microblaze at $500 USD (and the Altera Nios for similar cost) -- an insignificant fraction of a US engineer's salary. I suppose the upside is that old engineering saying: "copying is the highest form of flattery." :)
Reply by ●October 2, 20042004-10-02
Antti Lukats wrote:> > http://uclinux.openchip.org/forum/viewtopic.php?t=4 > > here is proof :) > > the opensource version as available from opencores is not yet good enough to > run uCLinux - well lets see if that will change, > I think there is a wish to have an open-souce multi-vendor FPGA softcare > capable to run uCLinux inside many people :)I could be wrong, but I thought open source cores that run uCLinux were already available for FPGAs. The only difference is that this one is code compatible with uBlaze. Am I wrong about this? -- Rick "rickman" Collins rick.collins@XYarius.com Ignore the reply address. To email me use the above address with the XY removed. Arius - A Signal Processing Solutions Company Specializing in DSP and FPGA design URL http://www.arius.com 4 King Ave 301-682-7772 Voice Frederick, MD 21701-3110 301-682-7666 FAX
Reply by ●October 2, 20042004-10-02
what is the use/future of dsprocessors in vls -- thevlsiguruwww.totallychips.com - VHDL, Verilog & General Hardware Design discussion Foru
Reply by ●October 2, 20042004-10-02
"Antti Lukats" <antti@case2000.com> wrote in message news:<cjlt48$uvo$01$1@news.t-online.com>...> > Antti Lukats wrote: > > I could be wrong, but I thought open source cores that run uCLinux were > > already available for FPGAs. The only difference is that this one is > > code compatible with uBlaze. Am I wrong about this? > > Yes, if there would be similar reference platform for OR1100, but it is not > available. LEON is real nice system, but the ref system hardly fits into > XCV2000 !!LEON is an implementation that is focused on a radiaton hard operation of an architecture (SPARC) that was designed for ASICs. Whereas MB is an architecture that was optimized from the beginning for a small FPGA implementation. There will never be a SPARC implementation that will get the same performance per LUT as MB does. AFAIK the OR1k architecture also is not optimzed for FPGA implementation and is therefore rather large. So I think it is great to see an open source implementation of MB. Can you comment on how many LUTs your implementation requires? Also: You mention on your web site that some instructions are not impleneted. Which instruection are these? Kolja Sulimma
Reply by ●October 2, 20042004-10-02
> LEON is an implementation that is focused on a radiaton hard operation > of an architecture (SPARC) that was designed for ASICs.It is designed for radiation hard per se? Isn't it just an open source SPARC. Do you knwo how to design for radiation hard applications, especially in an FPGA? Redundant structures and hoping that the synthesizer does not detect them and optimize it away... Martin
Reply by ●October 2, 20042004-10-02
"whatisasics" <whatisasics@none.net> wrote in message news:A5p7d.5328$nj.3186@newssvr13.news.prodigy.com...> Antti Lukats wrote: > > http://uclinux.openchip.org/forum/viewtopic.php?t=4 > > > > here is proof :) > > > > the opensource version as available from opencores is not yet goodenough to> > run uCLinux - well lets see if that will change, > > I think there is a wish to have an open-souce multi-vendor FPGA softcare > > capable to run uCLinux inside many people :) > > And this is what irks me...if you "need" a "free" FPGA cpu core, there > are already several to choose from (www.opencores.org.) One of themI dont know what the "irks" means, but - if it really irks you then please please: 1) goto to opencores, 2) download any of the several cores you mentioned 3) port the uCLinux reference desing for that core to the FPGA board you use 4) boot uCLinux to the shell prompt on your FPGA board I would really like to hear your comments after you have managed 1..4 from above! And please post with your real name not using anon email address! Antti PS porting MicroBlaze-uCLinux reference design (mbvanilla) to new FPGA board takes usually less than 5 hours
Reply by ●October 2, 20042004-10-02
"rickman" <spamgoeshere4@yahoo.com> wrote in message news:415E3A81.329A38AB@yahoo.com...> Antti Lukats wrote: > > > > http://uclinux.openchip.org/forum/viewtopic.php?t=4 > > > > here is proof :) > > > > the opensource version as available from opencores is not yet goodenough to> > run uCLinux - well lets see if that will change, > > I think there is a wish to have an open-souce multi-vendor FPGA softcare > > capable to run uCLinux inside many people :) > > I could be wrong, but I thought open source cores that run uCLinux were > already available for FPGAs. The only difference is that this one is > code compatible with uBlaze. Am I wrong about this?Hi Rick, Yes, OR1K is uCLinux capable, I guess also M68K and LEON and maybe Aquarius/SH-3 could be. The thing is that MicroBlaze-uCLinux reference design (mbvanilla) requires 1) any FPGA starting from XC2S200 2) 4MB SRAM/SDRAM/DDR 3) interrupt/timer/uart 4) porting of the mbvanilla to new board can be done withing few hours ASFAIK there is nothing to compete with that - OR1K reference design doesnt pass even synthesis out of box, just tried out of curiosity. MicroBlaze is small and minimal MicroBlaze-uCLinux is small as well, actually there is almost no overhead to make MicroBlaze system uCLinux reference design compatible. Yes, if there would be similar reference platform for OR1100, but it is not available. LEON is real nice system, but the ref system hardly fits into XCV2000 !! M68K is not complete i think and SH3, not sure if there is uCLinux available for it all. So you are not wrong per se, but I dont envy you if you try to use some existing open ip core for the uCLinux bringup. antti
Reply by ●October 2, 20042004-10-02
Antti Lukats wrote:> so as for the moment the open-MB is the smallest free-open IP-core with > "proven" gnu toolchain support I would say, or does some better alternative > exist ??What happened to all this implementations of the DLX ? There was the whole GNU chain available at one time, and a lot of people used them for their diploma work etc...
Reply by ●October 2, 20042004-10-02
> Ha, I see Martin has also already responded, for I just offered todonate my> acex jopcore PCB to the MB designer, so it goes for good cause at last! >Hi Antti, that's really nice (and funny) how much used this single board gets ;-) And a MB on an Altera FPGA, that's the end of the world. BTW: I have some more ACEX boards. I could donate them (or a small fee..) for projects that can convince me... Martin





