ZAP : An open source ARM processor (feedback)

Hi,

I am the author of the Gihub project ZAP ( https://github.com/krevanth/ZAP ). It is a 10-stage pipelined ARMv4T compatible soft processor core with cache and memory management support. I developed it during my final semester in university.

Would like your feedback/criticism of the project.

Thanks,
K Revanth

  

Awesome.  I look forward to looking at your work.

Thank you,
Rick C. Hodgin

On Sunday, May 28, 2017 at 8:45:44 AM UTC-4, Revanth Kamaraj wrote:
> Hi,
> 
> I am the author of the Gihub project ZAP ( https://github.com/krevanth/ZAP ). It is a 10-stage pipelined ARMv4T compatible soft processor core with cache and memory management support. I developed it during my final semester in university.
> 
> Would like your feedback/criticism of the project.

What can you advise me to do / look at for testing your core?

Thank you,
Rick C. Hodgin

On Sunday, May 28, 2017 at 10:45:20 PM UTC+5:30, Rick C. Hodgin wrote:
> On Sunday, May 28, 2017 at 8:45:44 AM UTC-4, Revanth Kamaraj wrote:
> > Hi,
> > 
> > I am the author of the Gihub project ZAP ( https://github.com/krevanth/ZAP ). It is a 10-stage pipelined ARMv4T compatible soft processor core with cache and memory management support. I developed it during my final semester in university.
> > 
> > Would like your feedback/criticism of the project.
> 
> What can you advise me to do / look at for testing your core?
> 
> Thank you,
> Rick C. Hodgin

Hi,

More test cases could be added to the core to thoroughly test it. See the sw/tests directory. Test cases may be easily added (the documentation describes how to add test cases).

One of the main things left to do is to build a basic Wishbone SoC around the core consisting of some simple peripherals (UARTs, GPIO, Interrupt Controller) etc. 

Thanks,
Revanth

revanth91kamaraj@gmail.com wrote on 5/28/2017 8:45 AM:
> Hi,
>
> I am the author of the Gihub project ZAP ( https://github.com/krevanth/ZAP ). It is a 10-stage pipelined ARMv4T compatible soft processor core with cache and memory management support. I developed it during my final semester in university.
>
> Would like your feedback/criticism of the project.

I am curious.  Has this been up long?  I remember some years ago, maybe as 
far back as 2002 ballpark, someone wrote code for an ARM7 I think.  He 
posted the code on opencores if I recall correctly.  It was only up a month 
or so and he received an invitation from ARM to discuss his code.  That 
means he got a call from an ARM lawyer.  Seems there are parts of the ARM 
architecture that are patented.  At that time it would have been very hard 
to design around the patent.  I think it was related to interrupt 
acknowledgement.

Again, if I recall correctly, ARM asked him to remove his code, but included 
a sweetener, they offered him a job!  So the code is gone.  I'm sorry I 
never downloaded a copy, but it is unlikely I would have bothered to build 
it, so no great loss.

That particular patent may have expired.  But you can be sure there are 
others that are still in force.  Otherwise, what would stop companies from 
writing their own ARM processors and not paying ARM a royalty?

I just looked up ARMv4T and that is the same instruction set as the ARM7T. 
With a 10 stage pipeline I guess your design is more like the ARM9T.  If 
this is the same instruction set, it must have the same interrupt 
acknowledge design, no?  If the patent has expired you may be home free.

Hmmm, while researching my facts for this I found a reddit page where you 
talk about patents and other things last December.  So I guess none of this 
is news to you.  :)   But that conversation was for the ARMv4 instruction 
set, not the ARMv4T.  Any patent surprises there?  I guess the ARMv4T is 
also beyond patent expiration dates, no?

-- 

Rick C

On Monday, May 29, 2017 at 11:14:25 AM UTC+5:30, rickman wrote:
> revanth91kamaraj@gmail.com wrote on 5/28/2017 8:45 AM:
> > Hi,
> >
> > I am the author of the Gihub project ZAP ( https://github.com/krevanth/ZAP ). It is a 10-stage pipelined ARMv4T compatible soft processor core with cache and memory management support. I developed it during my final semester in university.
> >
> > Would like your feedback/criticism of the project.
> 
> I am curious.  Has this been up long?  I remember some years ago, maybe as 
> far back as 2002 ballpark, someone wrote code for an ARM7 I think.  He 
> posted the code on opencores if I recall correctly.  It was only up a month 
> or so and he received an invitation from ARM to discuss his code.  That 
> means he got a call from an ARM lawyer.  Seems there are parts of the ARM 
> architecture that are patented.  At that time it would have been very hard 
> to design around the patent.  I think it was related to interrupt 
> acknowledgement.
> 
> Again, if I recall correctly, ARM asked him to remove his code, but included 
> a sweetener, they offered him a job!  So the code is gone.  I'm sorry I 
> never downloaded a copy, but it is unlikely I would have bothered to build 
> it, so no great loss.
> 
> That particular patent may have expired.  But you can be sure there are 
> others that are still in force.  Otherwise, what would stop companies from 
> writing their own ARM processors and not paying ARM a royalty?
> 
> I just looked up ARMv4T and that is the same instruction set as the ARM7T. 
> With a 10 stage pipeline I guess your design is more like the ARM9T.  If 
> this is the same instruction set, it must have the same interrupt 
> acknowledge design, no?  If the patent has expired you may be home free.
> 
> Hmmm, while researching my facts for this I found a reddit page where you 
> talk about patents and other things last December.  So I guess none of this 
> is news to you.  :)   But that conversation was for the ARMv4 instruction 
> set, not the ARMv4T.  Any patent surprises there?  I guess the ARMv4T is 
> also beyond patent expiration dates, no?
> 
> -- 
> 
> Rick C

Hi Rick,

The interrupt handling mechanism of ZAP is generic and the interrupt acknowledgement is implementation defined. Since Thumb has been around since at least 1994, I guess patents on it might have expired? 

Thanks,
Revanth 

On Monday, May 29, 2017 at 1:44:25 AM UTC-4, rickman wrote:
> ...I found a reddit page where you talk about patents and other things
> last December.  So I guess none of this is news to you.  :) ...

I would just like to state how damaging patents and intellectual property
rights are to the advancement of mankind.  They are nice for the private
advancement of a few, but they do not serve mankind well in any way,
shape, or form.  Even the incentive for profit they might bring for the
hard workers is not sufficient to override the loss to humanity when the
ability to learn and alter freely the cumulative knowledge of man is
suppressed by artificial means, such as by legal erections around otherwise
unencumbered concepts.

Patents, copyrights, and "intellectual property" rights are all evil,
of the devil, and serve to enslave us rather than free us.

Thank you,
Rick C. Hodgin

PS - Revanth, I only post this to address these systems.  I think your
     offering is not only fantastic, but exactly what we, as people,
     should be doing.  It is the best of us given over to others to
     then use as raw materials for their creation atop your prior work.
     Please allow me to say, "Thank you, Revanth," for your contribution
     to mankind.

Revanth Kamaraj wrote on 5/29/2017 10:20 AM:
> On Monday, May 29, 2017 at 11:14:25 AM UTC+5:30, rickman wrote:
>> revanth91kamaraj@gmail.com wrote on 5/28/2017 8:45 AM:
>>> Hi,
>>>
>>> I am the author of the Gihub project ZAP ( https://github.com/krevanth/ZAP ). It is a 10-stage pipelined ARMv4T compatible soft processor core with cache and memory management support. I developed it during my final semester in university.
>>>
>>> Would like your feedback/criticism of the project.
>>
>> I am curious.  Has this been up long?  I remember some years ago, maybe as
>> far back as 2002 ballpark, someone wrote code for an ARM7 I think.  He
>> posted the code on opencores if I recall correctly.  It was only up a month
>> or so and he received an invitation from ARM to discuss his code.  That
>> means he got a call from an ARM lawyer.  Seems there are parts of the ARM
>> architecture that are patented.  At that time it would have been very hard
>> to design around the patent.  I think it was related to interrupt
>> acknowledgement.
>>
>> Again, if I recall correctly, ARM asked him to remove his code, but included
>> a sweetener, they offered him a job!  So the code is gone.  I'm sorry I
>> never downloaded a copy, but it is unlikely I would have bothered to build
>> it, so no great loss.
>>
>> That particular patent may have expired.  But you can be sure there are
>> others that are still in force.  Otherwise, what would stop companies from
>> writing their own ARM processors and not paying ARM a royalty?
>>
>> I just looked up ARMv4T and that is the same instruction set as the ARM7T.
>> With a 10 stage pipeline I guess your design is more like the ARM9T.  If
>> this is the same instruction set, it must have the same interrupt
>> acknowledge design, no?  If the patent has expired you may be home free.
>>
>> Hmmm, while researching my facts for this I found a reddit page where you
>> talk about patents and other things last December.  So I guess none of this
>> is news to you.  :)   But that conversation was for the ARMv4 instruction
>> set, not the ARMv4T.  Any patent surprises there?  I guess the ARMv4T is
>> also beyond patent expiration dates, no?
>>
>> --
>>
>> Rick C
>
> Hi Rick,
>
> The interrupt handling mechanism of ZAP is generic and the interrupt acknowledgement is implementation defined. Since Thumb has been around since at least 1994, I guess patents on it might have expired?

I suppose.  That's why they have new designs that work better, faster, 
cheaper and have new patents.

So is your processor like the ARM9T?

-- 

Rick C

The closest thing the design might resemble is an xscale machine by Intel.

On Tuesday, May 30, 2017 at 2:16:23 PM UTC+5:30, Revanth Kamaraj wrote:
> The closest thing the design might resemble is an xscale machine by Intel.

*partially, not as complex as XScale.