Q: configuring FPGA Spartan2

Started by kopriva October 22, 2004
Hy!
I would like to make board with Spartan2 (exactly XC2S50-5PQ208), and that
FPGA must be configured in master serial mode using serial EPROM, exactly
M25P10. Does anybody know how to use serial EPROM M25P10 for configuring my
FPGA without using microcontroller or CPLD??
Problem is when I cleared configuration memory in FPGA, and configuration
pins are set in master serial mode, is there any way how to explain to FPGA
from which address in PROM, FPGA must start reading configuration memory??

Thanks
Ivan Koprivnic


Antti Lukats wrote:
> > Antti > www.openchip.org/bootx > configuration from MMC card, uses 21 PLD cells !:)
I've noticed that your posts here always seem to show a time a few hours ahead of when I am reading them. I checked the source in the post and your time zone is set to -7 hours, which is west coast US (Microsoft HQ). I am pretty sure you told me you are in Europe somewhere. I guess your time zone needs to be set to your local time? I belive the same is true for Mike Harding... :) -- Rick "rickman" Collins rick.collins@XYarius.com Ignore the reply address. To email me use the above address with the XY removed. Arius - A Signal Processing Solutions Company Specializing in DSP and FPGA design URL http://www.arius.com 4 King Ave 301-682-7772 Voice Frederick, MD 21701-3110 301-682-7666 FAX
"rickman" <spamgoeshere4@yahoo.com> wrote in message 
news:4179B9F4.881AF358@yahoo.com...
> Antti Lukats wrote: >> >> Antti >> www.openchip.org/bootx >> configuration from MMC card, uses 21 PLD cells !:) > > I've noticed that your posts here always seem to show a time a few hours > ahead of when I am reading them. I checked the source in the post and > your time zone is set to -7 hours, which is west coast US (Microsoft > HQ). I am pretty sure you told me you are in Europe somewhere. I guess > your time zone needs to be set to your local time? > > I belive the same is true for Mike Harding... :) >
I thought Mike was somewhere here in Australia which should be +10 UTC (For Sydney / NSW and Vic) According to whois on graphord.com or openchip.org Antti is in Clausthal-Zellerfeld , Lower Saxony You forget how much info a whois search gives. Alex
Alex Gibson wrote:
> > "rickman" <spamgoeshere4@yahoo.com> wrote in message > news:4179B9F4.881AF358@yahoo.com... > > Antti Lukats wrote: > >> > >> Antti > >> www.openchip.org/bootx > >> configuration from MMC card, uses 21 PLD cells !:) > > > > I've noticed that your posts here always seem to show a time a few hours > > ahead of when I am reading them. I checked the source in the post and > > your time zone is set to -7 hours, which is west coast US (Microsoft > > HQ). I am pretty sure you told me you are in Europe somewhere. I guess > > your time zone needs to be set to your local time? > > > > I belive the same is true for Mike Harding... :) > > > > I thought Mike was somewhere here in Australia > which should be +10 UTC (For Sydney / NSW and Vic) > > According to whois on graphord.com or openchip.org > Antti is in Clausthal-Zellerfeld , Lower Saxony > > You forget how much info a whois search gives.
I wasn't talking about where he was (except I was pretty sure it was not Redmond WA). I am talking about having his time zone set wrong... I notice you have yours set right. :) -- Rick "rickman" Collins rick.collins@XYarius.com Ignore the reply address. To email me use the above address with the XY removed. Arius - A Signal Processing Solutions Company Specializing in DSP and FPGA design URL http://www.arius.com 4 King Ave 301-682-7772 Voice Frederick, MD 21701-3110 301-682-7666 FAX
"kopriva" <ivan.koprivnic@mail.inet.hr> wrote in message
news:clbt9i$dkt$1@sunce.iskon.hr...
> Hy! > I would like to make board with Spartan2 (exactly XC2S50-5PQ208), and that > FPGA must be configured in master serial mode using serial EPROM, exactly > M25P10. Does anybody know how to use serial EPROM M25P10 for configuring
my
> FPGA without using microcontroller or CPLD?? > Problem is when I cleared configuration memory in FPGA, and configuration > pins are set in master serial mode, is there any way how to explain to
FPGA
> from which address in PROM, FPGA must start reading configuration memory??
NO WAY! only Altera Cyclone I/II, Stratix-II and Lattice EC can load itself from 25P10 style memories without the use of microcontroller or PLD. Antti www.openchip.org/bootx configuration from MMC card, uses 21 PLD cells !:)